| /external/llvm/lib/Target/Sparc/ |
| D | LeonPasses.cpp | 157 unsigned StartOp = InlineAsm::MIOp_FirstOperand; in runOnMachineFunction() local
160 for (unsigned i = StartOp, e = MI.getNumOperands(); i != e; ++i) { in runOnMachineFunction()
268 unsigned StartOp = InlineAsm::MIOp_FirstOperand; in runOnMachineFunction() local
271 for (unsigned i = StartOp, e = MI.getNumOperands(); i != e; ++i) { in runOnMachineFunction()
479 unsigned StartOp = InlineAsm::MIOp_FirstOperand; in runOnMachineFunction() local
482 for (unsigned i = StartOp, e = MI.getNumOperands(); i != e; ++i) { in runOnMachineFunction()
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| /external/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 1699 unsigned StartOp = 0, e = getNumOperands(); in print() local
1700 for (; StartOp < e && getOperand(StartOp).isReg() && in print()
1701 getOperand(StartOp).isDef() && in print()
1702 !getOperand(StartOp).isImplicit(); in print()
1703 ++StartOp) { in print()
1704 if (StartOp != 0) OS << ", "; in print()
1705 getOperand(StartOp).print(OS, MST, TRI); in print()
1706 unsigned Reg = getOperand(StartOp).getReg(); in print()
1715 if (StartOp != 0) in print()
1761 StartOp = AsmDescOp = InlineAsm::MIOp_FirstOperand; in print()
[all …]
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 1616 unsigned StartOp = 0; in print() local
1620 while (StartOp < e) { in print()
1621 const MachineOperand &MO = getOperand(StartOp); in print()
1625 if (StartOp != 0) in print()
1628 LLT TypeToPrint = MRI ? getTypeToPrint(StartOp, PrintedTypes, *MRI) : LLT{}; in print()
1629 unsigned TiedOperandIdx = getTiedOperandIdx(StartOp); in print()
1630 MO.print(OS, MST, TypeToPrint, StartOp, /*PrintDef=*/false, IsStandalone, in print()
1632 ++StartOp; in print()
1635 if (StartOp != 0) in print()
1708 StartOp = AsmDescOp = InlineAsm::MIOp_FirstOperand; in print()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 1495 unsigned StartOp = 0; in print() local
1499 while (StartOp < e) { in print()
1500 const MachineOperand &MO = getOperand(StartOp); in print()
1504 if (StartOp != 0) in print()
1507 LLT TypeToPrint = MRI ? getTypeToPrint(StartOp, PrintedTypes, *MRI) : LLT{}; in print()
1508 unsigned TiedOperandIdx = getTiedOperandIdx(StartOp); in print()
1509 MO.print(OS, MST, TypeToPrint, StartOp, /*PrintDef=*/false, IsStandalone, in print()
1511 ++StartOp; in print()
1514 if (StartOp != 0) in print()
1585 StartOp = AsmDescOp = InlineAsm::MIOp_FirstOperand; in print()
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 1163 unsigned StartOp = 2 + 2; in EmitUnwindingInstruction() local
1173 StartOp = 2; NumOffset = 2; in EmitUnwindingInstruction()
1179 for (unsigned i = StartOp, NumOps = MI->getNumOperands() - NumOffset; in EmitUnwindingInstruction()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 1099 unsigned StartOp = 2 + 2; in EmitUnwindingInstruction() local
1111 StartOp = 2; NumOffset = 2; in EmitUnwindingInstruction()
1118 for (unsigned i = StartOp, NumOps = MI->getNumOperands() - NumOffset; in EmitUnwindingInstruction()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 1127 unsigned StartOp = 2 + 2; in EmitUnwindingInstruction() local
1139 StartOp = 2; NumOffset = 2; in EmitUnwindingInstruction()
1146 for (unsigned i = StartOp, NumOps = MI->getNumOperands() - NumOffset; in EmitUnwindingInstruction()
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| /external/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3681 unsigned StartOp = NumOp == 3 ? 0 : 1; in expandMem16Inst() local
3683 const MCOperand &DstRegOp = Inst.getOperand(StartOp); in expandMem16Inst()
3685 const MCOperand &BaseRegOp = Inst.getOperand(StartOp + 1); in expandMem16Inst()
3687 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem16Inst()
3696 int16_t DstRegClass = Desc.OpInfo[StartOp].RegClass; in expandMem16Inst()
3808 unsigned StartOp = NumOp == 3 ? 0 : 1; in expandMem9Inst() local
3810 const MCOperand &DstRegOp = Inst.getOperand(StartOp); in expandMem9Inst()
3812 const MCOperand &BaseRegOp = Inst.getOperand(StartOp + 1); in expandMem9Inst()
3814 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem9Inst()
3823 int16_t DstRegClass = Desc.OpInfo[StartOp].RegClass; in expandMem9Inst()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3653 unsigned StartOp = NumOp == 3 ? 0 : 1; in expandMem16Inst() local
3655 const MCOperand &DstRegOp = Inst.getOperand(StartOp); in expandMem16Inst()
3657 const MCOperand &BaseRegOp = Inst.getOperand(StartOp + 1); in expandMem16Inst()
3659 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem16Inst()
3668 int16_t DstRegClass = Desc.OpInfo[StartOp].RegClass; in expandMem16Inst()
3780 unsigned StartOp = NumOp == 3 ? 0 : 1; in expandMem9Inst() local
3782 const MCOperand &DstRegOp = Inst.getOperand(StartOp); in expandMem9Inst()
3784 const MCOperand &BaseRegOp = Inst.getOperand(StartOp + 1); in expandMem9Inst()
3786 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem9Inst()
3795 int16_t DstRegClass = Desc.OpInfo[StartOp].RegClass; in expandMem9Inst()
|