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Searched refs:TFSRE0_EL1 (Results 1 – 7 of 7) sorted by relevance

/external/arm-trusted-firmware/include/arch/aarch64/
Darch_helpers.h521 DEFINE_RENAME_SYSREG_RW_FUNCS(tfsre0_el1, TFSRE0_EL1) in DEFINE_SYSREG_READ_FUNC()
Darch.h1051 #define TFSRE0_EL1 S3_0_C5_C6_1 macro
/external/arm-trusted-firmware/lib/el3_runtime/aarch64/
Dcontext.S522 mrs x15, TFSRE0_EL1
620 msr TFSRE0_EL1, x11
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darmv8.5a-mte.txt566 # CHECK: mrs x7, TFSRE0_EL1
601 # CHECK: msr TFSRE0_EL1, x7
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc944 TFSRE0_EL1 = 49841,
3008 { "TFSRE0_EL1", 0xC2B1, true, true, {AArch64::FeatureMTE} }, // 754
3540 { "TFSRE0_EL1", 754 },
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td1466 def : RWSysReg<"TFSRE0_EL1", 0b11, 0b000, 0b0101, 0b0110, 0b001>;
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td1468 def : RWSysReg<"TFSRE0_EL1", 0b11, 0b000, 0b0101, 0b0110, 0b001>;