Searched refs:TGSI_OPCODE_CEIL (Results 1 – 21 of 21) sorted by relevance
/external/virglrenderer/src/gallium/auxiliary/tgsi/ |
D | tgsi_util.c | 197 case TGSI_OPCODE_CEIL: in tgsi_util_get_inst_usage_mask()
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D | tgsi_info.c | 123 { 1, 1, 0, 0, 0, 0, COMP, "CEIL", TGSI_OPCODE_CEIL },
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/external/mesa3d/src/gallium/include/pipe/ |
D | p_shader_tokens.h | 433 TGSI_OPCODE_CEIL = 83, enumerator
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/external/virglrenderer/src/gallium/include/pipe/ |
D | p_shader_tokens.h | 416 #define TGSI_OPCODE_CEIL 83 macro
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/external/mesa3d/src/gallium/drivers/r300/ |
D | r300_tgsi_to_rc.c | 97 case TGSI_OPCODE_CEIL: return RC_OPCODE_CEIL; in translate_opcode()
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/external/mesa3d/src/gallium/drivers/i915/ |
D | i915_fpc_optimize.c | 80 [ TGSI_OPCODE_CEIL ] = { false, false, 0, 1, 1 },
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D | i915_fpc_translate.c | 491 case TGSI_OPCODE_CEIL: in i915_translate_instruction()
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
D | lp_bld_tgsi_aos.c | 767 case TGSI_OPCODE_CEIL: in lp_emit_instruction_aos()
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D | lp_bld_tgsi_action.c | 2539 bld_base->op_actions[TGSI_OPCODE_CEIL].emit = ceil_emit_cpu; in lp_set_default_actions_cpu()
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_lowering.c | 922 if (opcode == TGSI_OPCODE_CEIL) in transform_flr_ceil() 1395 case TGSI_OPCODE_CEIL: in transform_instr()
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D | tgsi_exec.c | 5662 case TGSI_OPCODE_CEIL: in exec_instruction()
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/external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
D | nvfx_vertprog.c | 559 case TGSI_OPCODE_CEIL: in nvfx_vertprog_parse_instruction()
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D | nvfx_fragprog.c | 540 case TGSI_OPCODE_CEIL: in nvfx_fragprog_parse_instruction()
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/external/mesa3d/src/gallium/auxiliary/nir/ |
D | nir_to_tgsi.c | 573 [nir_op_fceil] = { TGSI_OPCODE_CEIL, TGSI_OPCODE_DCEIL }, in ntt_emit_alu()
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D | tgsi_to_nir.c | 1860 [TGSI_OPCODE_CEIL] = nir_op_fceil,
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/external/mesa3d/src/gallium/drivers/svga/ |
D | svga_tgsi_insn.c | 2802 case TGSI_OPCODE_CEIL: in svga_emit_instruction()
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D | svga_tgsi_vgpu10.c | 829 case TGSI_OPCODE_CEIL: in translate_opcode() 9230 case TGSI_OPCODE_CEIL: in emit_vgpu10_instruction()
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_from_tgsi.cpp | 3183 case TGSI_OPCODE_CEIL: in handleInstruction()
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/external/mesa3d/src/gallium/drivers/r600/ |
D | r600_shader.c | 11756 [TGSI_OPCODE_CEIL] = { ALU_OP1_CEIL, tgsi_op2}, 11953 [TGSI_OPCODE_CEIL] = { ALU_OP1_CEIL, tgsi_op2}, 12179 [TGSI_OPCODE_CEIL] = { ALU_OP1_CEIL, tgsi_op2},
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/external/mesa3d/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi.cpp | 1914 emit_asm(ir, TGSI_OPCODE_CEIL, result_dst, op[0]); in visit_expression()
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/external/virglrenderer/src/ |
D | vrend_shader.c | 4975 case TGSI_OPCODE_CEIL: in iter_instruction()
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