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Searched refs:TGSI_OPCODE_DMUL (Results 1 – 12 of 12) sorted by relevance

/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_info.c242 { 1, 2, 0, 0, 0, 0, COMP, "DMUL", TGSI_OPCODE_DMUL },
430 case TGSI_OPCODE_DMUL: in tgsi_opcode_infer_type()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_info.c196 case TGSI_OPCODE_DMUL: in tgsi_opcode_infer_type()
Dtgsi_exec.c6069 case TGSI_OPCODE_DMUL: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h564 TGSI_OPCODE_DMUL = 200 /* SM5 */, enumerator
/external/virglrenderer/src/gallium/include/pipe/
Dp_shader_tokens.h546 #define TGSI_OPCODE_DMUL 200 /* SM5 */ macro
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_action.c922 tmp = lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_DMUL, in dmad_emit()
1212 bld_base->op_actions[TGSI_OPCODE_DMUL].emit = mul_emit; in lp_set_default_actions()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_vgpu10.c925 case TGSI_OPCODE_DMUL: in translate_opcode()
8548 case TGSI_OPCODE_DMUL: in opcode_has_dbl_dst()
8573 case TGSI_OPCODE_DMUL: in opcode_has_dbl_src()
8620 case TGSI_OPCODE_DMUL: in check_double_dst_writemask()
9284 case TGSI_OPCODE_DMUL: in emit_vgpu10_instruction()
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp584 case TGSI_OPCODE_DMUL: in inferSrcType()
4042 case TGSI_OPCODE_DMUL: in handleInstruction()
/external/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c638 [nir_op_fmul] = { TGSI_OPCODE_MUL, TGSI_OPCODE_DMUL }, in ntt_emit_alu()
Dtgsi_to_nir.c1957 [TGSI_OPCODE_DMUL] = nir_op_fmul,
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c12070 [TGSI_OPCODE_DMUL] = { ALU_OP2_MUL_64, cayman_mul_double_instr},
12296 [TGSI_OPCODE_DMUL] = { ALU_OP2_MUL_64, cayman_mul_double_instr},
/external/virglrenderer/src/
Dvrend_shader.c5007 case TGSI_OPCODE_DMUL: in iter_instruction()