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Searched refs:UVD_BASE_INST0_SEG1 (Results 1 – 1 of 1) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_vcn_dec.h197 #define UVD_BASE_INST0_SEG1 0x00007E00 macro
202 #define SOC15_REG_ADDR(reg) (UVD_BASE_INST0_SEG1 + reg)