Searched refs:V64Reg (Results 1 – 6 of 6) sorted by relevance
/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1233 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1234 EVT VT = V64Reg.getValueType(); in operator ()() 1238 SDLoc DL(V64Reg); in operator ()() 1242 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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D | AArch64ISelLowering.cpp | 4895 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 4896 EVT VT = V64Reg.getValueType(); in WidenVector() 4900 SDLoc DL(V64Reg); in WidenVector() 4903 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1387 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1388 EVT VT = V64Reg.getValueType(); in operator ()() 1392 SDLoc DL(V64Reg); in operator ()() 1396 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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D | AArch64ISelLowering.cpp | 6506 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 6507 EVT VT = V64Reg.getValueType(); in WidenVector() 6511 SDLoc DL(V64Reg); in WidenVector() 6514 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1568 SDValue operator()(SDValue V64Reg) { in operator ()() argument 1569 EVT VT = V64Reg.getValueType(); in operator ()() 1573 SDLoc DL(V64Reg); in operator ()() 1577 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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D | AArch64ISelLowering.cpp | 7790 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument 7791 EVT VT = V64Reg.getValueType(); in WidenVector() 7795 SDLoc DL(V64Reg); in WidenVector() 7798 V64Reg, DAG.getConstant(0, DL, MVT::i32)); in WidenVector()
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