Searched refs:VGPR32 (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | GCNRegPressure.cpp | 94 (STI->getRegSizeInBits(*RC) == 32 ? VGPR32 : VGPR_TUPLE); in getRegKind()
114 case VGPR32: in inc()
126 Value[Kind == SGPR_TUPLE ? SGPR32 : Kind == AGPR_TUPLE ? AGPR32 : VGPR32] += in inc()
186 OS << "VGPRs: " << Value[VGPR32] << ' '; in print()
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| D | GCNRegPressure.h | 32 VGPR32, enumerator
48 unsigned getVGPRNum() const { return std::max(Value[VGPR32], Value[AGPR32]); } in getVGPRNum()
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| D | AMDGPUCallingConv.td | 36 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
68 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | GCNRegPressure.cpp | 99 (STI->getRegSizeInBits(*RC) == 32 ? VGPR32 : VGPR_TUPLE); in getRegKind()
118 case VGPR32: in inc()
128 Value[Kind == SGPR_TUPLE ? SGPR32 : Kind == AGPR_TUPLE ? AGPR32 : VGPR32] += in inc()
188 OS << "VGPRs: " << Value[VGPR32] << ' '; in print()
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| D | GCNRegPressure.h | 40 VGPR32, enumerator
56 unsigned getVGPRNum() const { return std::max(Value[VGPR32], Value[AGPR32]); } in getVGPRNum()
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| D | AMDGPUCallingConv.td | 63 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
104 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
136 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallingConv.td | 43 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
84 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | spill-scavenge-offset.ll | 23 …m sideeffect "", "~{VGPR4},~{VGPR8},~{VGPR12},~{VGPR16},~{VGPR20},~{VGPR24},~{VGPR28},~{VGPR32}" ()
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