Searched refs:VGPRSpill (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIDefines.h | 42 VGPRSpill = 1 << 23, enumerator
|
| D | SIInstrInfo.h | 344 return MI.getDesc().TSFlags & SIInstrFlags::VGPRSpill; in isVGPRSpill()
348 return get(Opcode).TSFlags & SIInstrFlags::VGPRSpill; in isVGPRSpill()
|
| D | SIInstrFormats.td | 45 field bits<1> VGPRSpill = 0;
81 let TSFlags{23} = VGPRSpill;
|
| D | SIInstructions.td | 2090 let UseNamedOperandTable = 1, VGPRSpill = 1, Uses = [EXEC] in {
2106 } // End UseNamedOperandTable = 1, VGPRSpill = 1
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 48 field bit VGPRSpill = 0;
167 let TSFlags{24} = VGPRSpill;
|
| D | SIDefines.h | 55 VGPRSpill = 1 << 24, enumerator
|
| D | SIInstrInfo.h | 565 return MI.getDesc().TSFlags & SIInstrFlags::VGPRSpill; in isVGPRSpill()
569 return get(Opcode).TSFlags & SIInstrFlags::VGPRSpill; in isVGPRSpill()
|
| D | SIInstructions.td | 676 let UseNamedOperandTable = 1, VGPRSpill = 1,
702 } // End UseNamedOperandTable = 1, VGPRSpill = 1, SchedRW = [WriteVMEM]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 47 field bit VGPRSpill = 0;
158 let TSFlags{23} = VGPRSpill;
|
| D | SIDefines.h | 54 VGPRSpill = 1 << 23, enumerator
|
| D | SIInstrInfo.h | 543 return MI.getDesc().TSFlags & SIInstrFlags::VGPRSpill; in isVGPRSpill()
547 return get(Opcode).TSFlags & SIInstrFlags::VGPRSpill; in isVGPRSpill()
|
| D | SIInstructions.td | 543 let UseNamedOperandTable = 1, VGPRSpill = 1,
569 } // End UseNamedOperandTable = 1, VGPRSpill = 1, SchedRW = [WriteVMEM]
582 let UseNamedOperandTable = 1, VGPRSpill = 1,
609 } // End UseNamedOperandTable = 1, VGPRSpill = 1, SchedRW = [WriteVMEM]
|