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Searched refs:VT1 (Results 1 – 25 of 118) sorted by relevance

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/external/llvm-project/llvm/unittests/Transforms/IPO/
DWholeProgramDevirt.cpp17 VTableBits VT1; in TEST() local
18 VT1.ObjectSize = 8; in TEST()
19 VT1.Before.BytesUsed = {1 << 0}; in TEST()
20 VT1.After.BytesUsed = {1 << 1}; in TEST()
27 TypeMemberInfo TM1{&VT1, 0}; in TEST()
55 VT1.After.BytesUsed = {0xff, 0, 0, 0, 0xff}; in TEST()
62 VTableBits VT1; in TEST() local
63 VT1.ObjectSize = 8; in TEST()
68 TypeMemberInfo TM1{&VT1, 0}; in TEST()
86 EXPECT_EQ(std::vector<uint8_t>{1}, VT1.Before.Bytes); in TEST()
[all …]
/external/llvm/unittests/Transforms/IPO/
DWholeProgramDevirt.cpp18 VTableBits VT1; in TEST() local
19 VT1.ObjectSize = 8; in TEST()
20 VT1.Before.BytesUsed = {1 << 0}; in TEST()
21 VT1.After.BytesUsed = {1 << 1}; in TEST()
28 TypeMemberInfo TM1{&VT1, 0}; in TEST()
56 VT1.After.BytesUsed = {0xff, 0, 0, 0, 0xff}; in TEST()
63 VTableBits VT1; in TEST() local
64 VT1.ObjectSize = 8; in TEST()
69 TypeMemberInfo TM1{&VT1, 0}; in TEST()
87 EXPECT_EQ(std::vector<uint8_t>{1}, VT1.Before.Bytes); in TEST()
[all …]
/external/autotest/client/site_tests/graphics_VTSwitch/
Dcontrol.10011 - VT1 and VT2 are not sufficiently different.
12 - VT1 does not remain the same between VT switches.
25 Switches between VT1 and VT2 repeatedly and logs in/out of Chrome to make sure
27 sure each VT remains the same between VT switches, and that VT1 and VT2 are
Dcontrol11 - VT1 and VT2 are not sufficiently different.
12 - VT1 does not remain the same between VT switches.
26 Switches between VT1 and VT2 repeatedly and logs in/out of Chrome to make sure
28 sure each VT remains the same between VT switches, and that VT1 and VT2 are
/external/llvm-project/llvm/test/Transforms/WholeProgramDevirt/
Dimport.ll34 ; VCP: [[VT1:%.*]] = bitcast {{.*}} to i8*
38 …; VCP-X86: [[GEP1:%.*]] = getelementptr i8, i8* [[VT1]], i32 ptrtoint ([0 x i8]* @__typeid_typeid1…
39 ; VCP-ARM: [[GEP1:%.*]] = getelementptr i8, i8* [[VT1]], i32 42
43 ; BRANCH-FUNNEL-NOVCP: [[VT1:%.*]] = bitcast {{.*}} to i8*
44 …d ()* @__typeid_typeid1_0_branch_funnel to i32 (i8*, i8*, i32)*)(i8* nest [[VT1]], i8* %obj, i32 1)
53 ; BRANCH-FUNNEL: [[VT1:%.*]] = bitcast {{.*}} to i8*
67 …d ()* @__typeid_typeid2_8_branch_funnel to i1 (i8*, i8*, i32)*)(i8* nest [[VT1]], i8* %obj, i32 un…
/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h462 SDVTList getVTList(EVT VT1, EVT VT2);
463 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
464 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
1023 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2);
1024 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1026 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1028 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1030 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1032 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1034 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
[all …]
/external/llvm-project/llvm/include/llvm/IR/
DLegacyPassNameParser.h89 static int ValCompare(const PassNameParser::OptionInfo *VT1, in ValCompare() argument
91 return VT1->Name.compare(VT2->Name); in ValCompare()
/external/llvm/test/Transforms/WholeProgramDevirt/
Dunique-retval.ll23 ; CHECK: [[VT1:%[^ ]*]] = bitcast [1 x i8*]* {{.*}} to i8*
30 ; CHECK: [[RES1:%[^ ]*]] = icmp eq i8* [[VT1]], bitcast ([1 x i8*]* @vt3 to i8*)
47 ; CHECK: [[RES1:%[^ ]*]] = icmp ne i8* [[VT1]], bitcast ([1 x i8*]* @vt2 to i8*)
/external/llvm-project/mlir/tools/mlir-tblgen/
Dmlir-tblgen.cpp47 [](const GenNameParser::OptionInfo *VT1, in printOptionInfo()
49 return VT1->Name.compare(VT2->Name); in printOptionInfo()
/external/llvm/include/llvm/IR/
DLegacyPassNameParser.h90 static int ValLessThan(const PassNameParser::OptionInfo *VT1, in ValLessThan() argument
92 return std::strcmp(VT1->Name, VT2->Name); in ValLessThan()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DLegacyPassNameParser.h89 static int ValCompare(const PassNameParser::OptionInfo *VT1, in ValCompare() argument
91 return VT1->Name.compare(VT2->Name); in ValCompare()
/external/eigen/unsupported/test/
DFFTW.cpp28 template <typename VT1,typename VT2>
29 long double fft_rmse( const VT1 & fftbuf,const VT2 & timebuf) in fft_rmse()
50 template <typename VT1,typename VT2>
51 long double dif_rmse( const VT1 buf1,const VT2 buf2) in dif_rmse()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPURewriteOutArguments.cpp212 auto *VT1 = dyn_cast<FixedVectorType>(Ty1); in isVec3ToVec4Shuffle() local
213 if (!VT0 || !VT1) in isVec3ToVec4Shuffle()
217 VT1->getNumElements() != 4) in isVec3ToVec4Shuffle()
221 DL->getTypeSizeInBits(VT1->getElementType()); in isVec3ToVec4Shuffle()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPURewriteOutArguments.cpp212 VectorType *VT1 = dyn_cast<VectorType>(Ty1); in isVec3ToVec4Shuffle() local
213 if (!VT0 || !VT1) in isVec3ToVec4Shuffle()
217 VT1->getNumElements() != 4) in isVec3ToVec4Shuffle()
221 DL->getTypeSizeInBits(VT1->getElementType()); in isVec3ToVec4Shuffle()
/external/llvm-project/llvm/lib/Target/BPF/
DBPFISelLowering.h129 bool isTruncateFree(EVT VT1, EVT VT2) const override;
133 bool isZExtFree(EVT VT1, EVT VT2) const override;
DBPFISelLowering.cpp181 bool BPFTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() argument
182 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree()
184 unsigned NumBits1 = VT1.getSizeInBits(); in isTruncateFree()
197 bool BPFTargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree() argument
198 if (!getHasAlu32() || !VT1.isInteger() || !VT2.isInteger()) in isZExtFree()
200 unsigned NumBits1 = VT1.getSizeInBits(); in isZExtFree()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h110 bool isTruncateFree(EVT VT1, EVT VT2) const override;
121 bool isZExtFree(EVT VT1, EVT VT2) const override;
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DSelectionDAG.h572 SDVTList getVTList(EVT VT1, EVT VT2);
573 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
574 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
1250 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2);
1251 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1253 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1255 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1257 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1287 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1289 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h113 bool isTruncateFree(EVT VT1, EVT VT2) const override;
124 bool isZExtFree(EVT VT1, EVT VT2) const override;
/external/llvm-project/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h117 bool isTruncateFree(EVT VT1, EVT VT2) const override;
128 bool isZExtFree(EVT VT1, EVT VT2) const override;
/external/llvm-project/llvm/include/llvm/CodeGen/
DSelectionDAG.h610 SDVTList getVTList(EVT VT1, EVT VT2);
611 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
612 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
1452 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2);
1453 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1455 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1457 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1487 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1489 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
1491 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp1878 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { in CreateStackTemporary() argument
1879 unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize()); in CreateStackTemporary()
1880 Type *Ty1 = VT1.getTypeForEVT(*getContext()); in CreateStackTemporary()
5636 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { in getVTList() argument
5639 ID.AddInteger(VT1.getRawBits()); in getVTList()
5646 Array[0] = VT1; in getVTList()
5654 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { in getVTList() argument
5657 ID.AddInteger(VT1.getRawBits()); in getVTList()
5665 Array[0] = VT1; in getVTList()
5674 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { in getVTList() argument
[all …]
/external/kernel-headers/original/uapi/asm-generic/
Dtermbits.h107 #define VT1 0040000 macro
/external/clang/test/SemaCXX/
Dattr-mode-tmpl.cpp28 …typedef T __attribute__((mode(V2SI))) VT1; // expected-error{{mode attribute only supported for in… in CheckPrimitiveTypes() typedef
/external/llvm-project/clang/test/SemaCXX/
Dattr-mode-tmpl.cpp28 …typedef T __attribute__((mode(V2SI))) VT1; // expected-error{{mode attribute only supported for in… in CheckPrimitiveTypes() typedef

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