/external/llvm-project/llvm/include/llvm/CodeGen/ |
D | SelectionDAG.h | 975 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, 981 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, 1004 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList); 1005 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N); 1006 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1008 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1010 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1012 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1157 SDVTList VTList, ArrayRef<SDValue> Ops, 1165 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, [all …]
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D | TargetRegisterInfo.h | 234 vt_iterator VTList; member 304 return getRegClassInfo(RC).VTList; in legalclasstypes_begin()
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D | SelectionDAGISel.h | 323 SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 2525 SDVTList VTList = DAG.getVTList(NVT, getSetCCResultType(NVT)); in ExpandIntRes_ADDSUB() local 2527 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 2529 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2531 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 2533 Hi = DAG.getNode(ISD::SUBCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2549 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue); in ExpandIntRes_ADDSUB() local 2551 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 2553 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2555 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 2557 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() [all …]
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D | SelectionDAG.cpp | 503 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { in AddNodeIDValueTypes() argument 504 ID.AddPointer(VTList.VTs); in AddNodeIDValueTypes() 526 SDVTList VTList, ArrayRef<SDValue> OpList) { in AddNodeIDNode() argument 528 AddNodeIDValueTypes(ID, VTList); in AddNodeIDNode() 6701 SDVTList VTList, ArrayRef<SDValue> Ops, in getAtomic() argument 6705 AddNodeIDNode(ID, Opcode, VTList, Ops); in getAtomic() 6714 VTList, MemVT, MMO); in getAtomic() 6785 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, in getMemIntrinsicNode() argument 6797 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO); in getMemIntrinsicNode() 6801 SDVTList VTList, in getMemIntrinsicNode() argument [all …]
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D | SelectionDAGISel.cpp | 2434 MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList, in MorphNode() argument 2455 SDNode *Res = CurDAG->MorphNodeTo(Node, ~TargetOpc, VTList, Ops); in MorphNode() 3434 SDVTList VTList; in SelectCodeCommon() local 3436 VTList = CurDAG->getVTList(VTs[0]); in SelectCodeCommon() 3438 VTList = CurDAG->getVTList(VTs[0], VTs[1]); in SelectCodeCommon() 3440 VTList = CurDAG->getVTList(VTs); in SelectCodeCommon() 3496 VTList, Ops); in SelectCodeCommon() 3515 Res = cast<MachineSDNode>(MorphNode(NodeToMatch, TargetOpc, VTList, in SelectCodeCommon()
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D | ScheduleDAGSDNodes.cpp | 146 SDVTList VTList = DAG->getVTList(VTs); in CloneNodeWithValues() local 154 DAG->MorphNodeTo(N, N->getOpcode(), VTList, Ops); in CloneNodeWithValues()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | SelectionDAG.h | 928 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, 947 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList); 948 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N); 949 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 951 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 953 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 955 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1067 SDVTList VTList, ArrayRef<SDValue> Ops, 1075 unsigned Opcode, const SDLoc &dl, SDVTList VTList, 1084 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList, [all …]
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D | TargetRegisterInfo.h | 234 vt_iterator VTList; member 298 return getRegClassInfo(RC).VTList; in legalclasstypes_begin()
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D | SelectionDAGISel.h | 329 SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 457 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { in AddNodeIDValueTypes() argument 458 ID.AddPointer(VTList.VTs); in AddNodeIDValueTypes() 480 SDVTList VTList, ArrayRef<SDValue> OpList) { in AddNodeIDNode() argument 482 AddNodeIDValueTypes(ID, VTList); in AddNodeIDNode() 6583 SDVTList VTList, ArrayRef<SDValue> Ops, in getAtomic() argument 6587 AddNodeIDNode(ID, Opcode, VTList, Ops); in getAtomic() 6596 VTList, MemVT, MMO); in getAtomic() 6667 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, in getMemIntrinsicNode() argument 6682 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO); in getMemIntrinsicNode() 6686 SDVTList VTList, in getMemIntrinsicNode() argument [all …]
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D | LegalizeIntegerTypes.cpp | 2268 SDVTList VTList = DAG.getVTList(NVT, getSetCCResultType(NVT)); in ExpandIntRes_ADDSUB() local 2270 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 2272 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2274 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 2276 Hi = DAG.getNode(ISD::SUBCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2292 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue); in ExpandIntRes_ADDSUB() local 2294 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 2296 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2298 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 2300 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() [all …]
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D | SelectionDAGISel.cpp | 2426 MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList, in MorphNode() argument 2447 SDNode *Res = CurDAG->MorphNodeTo(Node, ~TargetOpc, VTList, Ops); in MorphNode() 3424 SDVTList VTList; in SelectCodeCommon() local 3426 VTList = CurDAG->getVTList(VTs[0]); in SelectCodeCommon() 3428 VTList = CurDAG->getVTList(VTs[0], VTs[1]); in SelectCodeCommon() 3430 VTList = CurDAG->getVTList(VTs); in SelectCodeCommon() 3486 VTList, Ops); in SelectCodeCommon() 3505 Res = cast<MachineSDNode>(MorphNode(NodeToMatch, TargetOpc, VTList, in SelectCodeCommon()
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D | ScheduleDAGSDNodes.cpp | 146 SDVTList VTList = DAG->getVTList(VTs); in CloneNodeWithValues() local 154 DAG->MorphNodeTo(N, N->getOpcode(), VTList, Ops); in CloneNodeWithValues()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 347 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { in AddNodeIDValueTypes() argument 348 ID.AddPointer(VTList.VTs); in AddNodeIDValueTypes() 372 SDVTList VTList, ArrayRef<SDValue> OpList) { in AddNodeIDNode() argument 374 AddNodeIDValueTypes(ID, VTList); in AddNodeIDNode() 4799 SDVTList VTList, ArrayRef<SDValue> Ops, in getAtomic() argument 4806 AddNodeIDNode(ID, Opcode, VTList, Ops); in getAtomic() 4815 VTList, MemVT, MMO, SuccessOrdering, in getAtomic() 4825 SDVTList VTList, ArrayRef<SDValue> Ops, in getAtomic() argument 4828 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering, in getAtomic() 4954 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, in getMemIntrinsicNode() argument [all …]
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D | LegalizeIntegerTypes.cpp | 1747 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue); in ExpandIntRes_ADDSUB() local 1749 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 1751 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 1753 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 1755 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 1765 SDVTList VTList = DAG.getVTList(NVT, NVT); in ExpandIntRes_ADDSUB() local 1770 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 1774 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB() 1825 SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Glue); in ExpandIntRes_ADDSUBC() local 1830 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUBC() [all …]
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D | SelectionDAGISel.cpp | 2407 MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList, in MorphNode() argument 2428 SDNode *Res = CurDAG->MorphNodeTo(Node, ~TargetOpc, VTList, Ops); in MorphNode() 3325 SDVTList VTList; in SelectCodeCommon() local 3327 VTList = CurDAG->getVTList(VTs[0]); in SelectCodeCommon() 3329 VTList = CurDAG->getVTList(VTs[0], VTs[1]); in SelectCodeCommon() 3331 VTList = CurDAG->getVTList(VTs); in SelectCodeCommon() 3376 VTList, Ops); in SelectCodeCommon() 3395 Res = MorphNode(NodeToMatch, TargetOpc, VTList, Ops, EmitNodeInfo); in SelectCodeCommon()
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D | ScheduleDAGSDNodes.cpp | 146 SDVTList VTList = DAG->getVTList(VTs); in CloneNodeWithValues() local 156 DAG->MorphNodeTo(N, N->getOpcode(), VTList, Ops); in CloneNodeWithValues()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelDAGToDAG.cpp | 434 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local 450 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdHi), VTList, in matchLoadD16FromBuildVector() 468 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local 484 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdLo), VTList, in matchLoadD16FromBuildVector() 1021 SDVTList VTList = CurDAG->getVTList(MVT::i32, MVT::Glue); in SelectADD_SUB_I64() local 1029 AddLo = CurDAG->getMachineNode(Opc, DL, VTList, Args); in SelectADD_SUB_I64() 1032 AddLo = CurDAG->getMachineNode(CarryOpc, DL, VTList, Args); in SelectADD_SUB_I64() 1039 SDNode *AddHi = CurDAG->getMachineNode(CarryOpc, DL, VTList, AddHiArgs); in SelectADD_SUB_I64()
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D | SIISelLowering.h | 102 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
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D | SIISelLowering.cpp | 4153 SDVTList VTList = DAG.getVTList(EquivLoadVT, MVT::Other); in adjustLoadValueType() local 4158 VTList, Ops, M->getMemoryVT(), in adjustLoadValueType() 4195 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad() local 4196 SDValue MemNode = getMemIntrinsicNode(Opc, DL, VTList, Ops, CastVT, in lowerIntrinsicLoad() 5711 SDVTList VTList = DAG.getVTList({LoadVT, MVT::Glue}); in lowerSBuffer() local 5731 Loads.push_back(getMemIntrinsicNode(AMDGPUISD::BUFFER_LOAD, DL, VTList, Ops, in lowerSBuffer() 6731 SDVTList VTList, in getMemIntrinsicNode() argument 6735 EVT VT = VTList.VTs[0]; in getMemIntrinsicNode() 6747 assert(VTList.NumVTs == 2); in getMemIntrinsicNode() 6748 SDVTList WidenedVTList = DAG.getVTList(WidenedVT, VTList.VTs[1]); in getMemIntrinsicNode() [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | SelectionDAG.h | 886 SDVTList VTList, ArrayRef<SDValue> Ops, 891 SDVTList VTList, ArrayRef<SDValue> Ops, 899 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList, 905 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList,
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelDAGToDAG.cpp | 439 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local 455 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdHi), VTList, in matchLoadD16FromBuildVector() 473 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local 489 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdLo), VTList, in matchLoadD16FromBuildVector() 1051 SDVTList VTList = CurDAG->getVTList(MVT::i32, MVT::Glue); in SelectADD_SUB_I64() local 1065 AddLo = CurDAG->getMachineNode(Opc, DL, VTList, Args); in SelectADD_SUB_I64() 1068 AddLo = CurDAG->getMachineNode(CarryOpc, DL, VTList, Args); in SelectADD_SUB_I64() 1075 SDNode *AddHi = CurDAG->getMachineNode(CarryOpc, DL, VTList, AddHiArgs); in SelectADD_SUB_I64()
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/external/llvm/utils/TableGen/ |
D | CodeGenDAGPatterns.cpp | 63 EEVT::TypeSet::TypeSet(ArrayRef<MVT::SimpleValueType> VTList) { in TypeSet() argument 64 assert(!VTList.empty() && "empty list?"); in TypeSet() 65 TypeVec.append(VTList.begin(), VTList.end()); in TypeSet() 67 if (!VTList.empty()) in TypeSet() 68 assert(VTList[0] != MVT::iAny && VTList[0] != MVT::vAny && in TypeSet() 69 VTList[0] != MVT::fAny); in TypeSet()
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D | CodeGenDAGPatterns.h | 62 TypeSet(ArrayRef<MVT::SimpleValueType> VTList);
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