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Searched refs:XORI (Results 1 – 25 of 40) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dfixup-kill-dead-flag-crash.mir18 %4:gprc = XORI killed %3:gprc, 63
Dtwo-address-crash.mir86 %11:gprc = XORI killed %10, 1
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrHTM.td94 // failed (1). We use an XORI pattern to 'flip' the bit to match the
98 (XORI (TBEGIN_RET(HTM_get_imm imm:$R)), 1)>;
DPPCInstrInfo.cpp2359 Opc == PPC::ORI || Opc == PPC::ORI8 || Opc == PPC::XORI || in getForwardingDefMI()
2917 case PPC::XORI: in convertToImmediateForm()
3075 case PPC::XOR: III.ImmOpcode = PPC::XORI; break; in instrHasImmForm()
4062 case PPC::XORI: in isSignOrZeroExtended()
DPPCISelDAGToDAG.cpp2940 return SDValue(CurDAG->getMachineNode(PPC::XORI, dl, MVT::i32, Shift, in get32BitZExtCompare()
3123 SDValue(CurDAG->getMachineNode(PPC::XORI, dl, MVT::i32, Shift, in get32BitSExtCompare()
4118 CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Op, getI32Imm(1, dl)); in trySETCC()
4187 CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Tmp, getI32Imm(1, dl)); in trySETCC()
/external/llvm/lib/Target/PowerPC/
DPPCInstrHTM.td93 // failed (1). We use an XORI pattern to 'flip' the bit to match the
97 (XORI
DPPCISelDAGToDAG.cpp2345 CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Op, getI32Imm(1, dl)); in trySETCC()
2408 CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Tmp, getI32Imm(1, dl)); in trySETCC()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrHTM.td94 // failed (1). We use an XORI pattern to 'flip' the bit to match the
98 (XORI (TBEGIN_RET(HTM_get_imm imm:$R)), 1)>;
DPPCInstrInfo.cpp2807 Opc == PPC::ORI || Opc == PPC::ORI8 || Opc == PPC::XORI || in getForwardingDefMI()
3508 case PPC::XOR: III.ImmOpcode = PPC::XORI; break; in instrHasImmForm()
4212 case PPC::XORI: in simplifyToLI()
4845 case PPC::XORI: in isSignOrZeroExtended()
DPPCISelDAGToDAG.cpp2900 return SDValue(CurDAG->getMachineNode(PPC::XORI, dl, MVT::i32, Shift, in get32BitZExtCompare()
3083 SDValue(CurDAG->getMachineNode(PPC::XORI, dl, MVT::i32, Shift, in get32BitSExtCompare()
4101 CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Op, getI32Imm(1, dl)); in trySETCC()
4169 CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Tmp, getI32Imm(1, dl)); in trySETCC()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td416 def XORI : ALU_ri<0b100, "xori">;
591 def : InstAlias<"not $rd, $rs", (XORI GPR:$rd, GPR:$rs, -1)>;
710 (XORI GPR:$rd, GPR:$rs1, simm12:$imm12)>;
803 def : PatGprSimm12<xor, XORI>;
849 (SLTIU (XORI GPR:$rs1, simm12:$imm12), 1)>;
853 (SLTU X0, (XORI GPR:$rs1, simm12:$imm12))>;
855 def : Pat<(setuge GPR:$rs1, GPR:$rs2), (XORI (SLTU GPR:$rs1, GPR:$rs2), 1)>;
856 def : Pat<(setule GPR:$rs1, GPR:$rs2), (XORI (SLTU GPR:$rs2, GPR:$rs1), 1)>;
858 def : Pat<(setge GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs1, GPR:$rs2), 1)>;
859 def : Pat<(setle GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs2, GPR:$rs1), 1)>;
DRISCVExpandPseudoInsts.cpp259 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doAtomicBinOpExpansion()
340 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doMaskedAtomicBinOpExpansion()
DRISCVInstrInfo.cpp499 case RISCV::XORI: in isAsCheapAsAMove()
/external/pcre/dist2/src/sljit/
DsljitNativePPC_32.c210 return push_inst(compiler, XORI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
218 FAIL_IF(push_inst(compiler, XORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
DsljitNativePPC_64.c359 return push_inst(compiler, XORI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
367 FAIL_IF(push_inst(compiler, XORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
DsljitNativeMIPS_32.c140 return push_inst(compiler, XORI | SA(EQUAL_FLAG) | TA(EQUAL_FLAG) | IMM(1), EQUAL_FLAG); in emit_single_op()
399 EMIT_LOGICAL(XORI, XOR); in emit_single_op()
DsljitNativeMIPS_64.c231 return push_inst(compiler, XORI | SA(EQUAL_FLAG) | TA(EQUAL_FLAG) | IMM(1), EQUAL_FLAG); in emit_single_op()
495 EMIT_LOGICAL(XORI, XOR); in emit_single_op()
DsljitNativePPC_common.c227 #define XORI (HI(26)) macro
2201 FAIL_IF(push_inst(compiler, XORI | S(reg) | A(reg) | 0x1)); in sljit_emit_op_flags()
DsljitNativeMIPS_common.c253 #define XORI (HI(14)) macro
2161 FAIL_IF(push_inst(compiler, XORI | SA(src_ar) | TA(dst_ar) | IMM(1), dst_ar)); in sljit_emit_op_flags()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td466 def XORI : ALU_ri<0b100, "xori">;
653 def : InstAlias<"not $rd, $rs", (XORI GPR:$rd, GPR:$rs, -1)>;
772 (XORI GPR:$rd, GPR:$rs1, simm12:$imm12)>;
865 def : PatGprSimm12<xor, XORI>;
917 def : Pat<(setuge GPR:$rs1, GPR:$rs2), (XORI (SLTU GPR:$rs1, GPR:$rs2), 1)>;
918 def : Pat<(setule GPR:$rs1, GPR:$rs2), (XORI (SLTU GPR:$rs2, GPR:$rs1), 1)>;
920 def : Pat<(setge GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs1, GPR:$rs2), 1)>;
921 def : Pat<(setle GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs2, GPR:$rs1), 1)>;
DRISCVExpandAtomicPseudoInsts.cpp242 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doAtomicBinOpExpansion()
323 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doMaskedAtomicBinOpExpansion()
DRISCVInstrInfo.cpp547 case RISCV::XORI: in isAsCheapAsAMove()
DRISCVInstrInfoB.td69 // Checks if this mask has a single 1 bit and cannot be used with ORI/XORI.
682 def : CompressPat<(XORI GPRC:$rs1, GPRC:$rs1, -1),
/external/llvm-project/llvm/test/CodeGen/RISCV/
Dimm.ll426 ; This constant can be materialized for RV64 with LUI+SRLI+XORI.
/external/llvm-project/llvm/test/TableGen/
DGlobalISelEmitter.td606 // R02C-NEXT: // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$src1, -2:{ *:[i32] }) => (XORI:{ *:[i32] } …
607 // R02C-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/MyTarget::XORI,
621 def XORI : I<(outs GPR32:$dst), (ins m1:$src2, GPR32:$src1),

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