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Searched refs:__msa_adds_u_b (Results 1 – 8 of 8) sorted by relevance

/external/libvpx/libvpx/vpx_dsp/mips/
Dloopfilter_msa.h163 p0_asub_q0_m = __msa_adds_u_b(p0_asub_q0_m, p0_asub_q0_m); \
165 p0_asub_q0_m = __msa_adds_u_b(p0_asub_q0_m, p1_asub_q1_m); \
/external/libaom/libaom/aom_dsp/mips/
Dloopfilter_msa.h237 p0_asub_q0_m = __msa_adds_u_b(p0_asub_q0_m, p0_asub_q0_m); \
239 p0_asub_q0_m = __msa_adds_u_b(p0_asub_q0_m, p1_asub_q1_m); \
/external/libvpx/libvpx/vp8/common/mips/msa/
Dloopfilter_filters_msa.c22 p0_a_sub_q0 = __msa_adds_u_b(p0_a_sub_q0, p0_a_sub_q0); \
23 mask = __msa_adds_u_b(p0_a_sub_q0, p1_a_sub_q1); \
185 p0_asub_q0_m = __msa_adds_u_b(p0_asub_q0_m, p0_asub_q0_m); \
187 p0_asub_q0_m = __msa_adds_u_b(p0_asub_q0_m, p1_asub_q1_m); \
/external/webp/src/dsp/
Ddec_msa.c280 p0_asub_q0_m = __msa_adds_u_b(p0_asub_q0_m, p0_asub_q0_m); \
282 p0_asub_q0_m = __msa_adds_u_b(p0_asub_q0_m, p1_asub_q1_m); \
335 p0_a_sub_q0 = __msa_adds_u_b(p0_a_sub_q0, p0_a_sub_q0); \
336 mask = __msa_adds_u_b(p0_a_sub_q0, p1_a_sub_q1); \
/external/llvm-project/clang/lib/Headers/
Dmsa.h243 #define __msa_adds_u_b __builtin_msa_adds_u_b macro
/external/libvpx/libvpx/third_party/libyuv/source/
Drow_msa.cc1207 dst0 = __msa_adds_u_b(src0, src2); in ARGBAddRow_MSA()
1208 dst1 = __msa_adds_u_b(src1, src3); in ARGBAddRow_MSA()
2358 vec0 = __msa_adds_u_b(src0, src1); in SobelRow_MSA()
2382 dst0 = __msa_adds_u_b(src0, src2); in SobelToPlaneRow_MSA()
2383 dst1 = __msa_adds_u_b(src1, src3); in SobelToPlaneRow_MSA()
2403 vec0 = __msa_adds_u_b(src0, src1); in SobelXYRow_MSA()
/external/libyuv/files/source/
Drow_msa.cc1207 dst0 = __msa_adds_u_b(src0, src2); in ARGBAddRow_MSA()
1208 dst1 = __msa_adds_u_b(src1, src3); in ARGBAddRow_MSA()
2358 vec0 = __msa_adds_u_b(src0, src1); in SobelRow_MSA()
2382 dst0 = __msa_adds_u_b(src0, src2); in SobelToPlaneRow_MSA()
2383 dst1 = __msa_adds_u_b(src1, src3); in SobelToPlaneRow_MSA()
2403 vec0 = __msa_adds_u_b(src0, src1); in SobelXYRow_MSA()
/external/llvm-project/clang/test/CodeGen/
Dbuiltins-mips-msa.c66 v16u8_r = __msa_adds_u_b(v16u8_a, v16u8_b); // CHECK: call <16 x i8> @llvm.mips.adds.u.b( in test()