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Searched refs:__msa_ilvr_d (Results 1 – 17 of 17) sorted by relevance

/external/libvpx/libvpx/vpx_dsp/mips/
Dloopfilter_4_msa.c55 thresh0 = (v16u8)__msa_ilvr_d((v2i64)thresh1, (v2i64)thresh0); in vpx_lpf_horizontal_4_dual_msa()
59 b_limit0 = (v16u8)__msa_ilvr_d((v2i64)b_limit1, (v2i64)b_limit0); in vpx_lpf_horizontal_4_dual_msa()
63 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0); in vpx_lpf_horizontal_4_dual_msa()
124 thresh0 = (v16u8)__msa_ilvr_d((v2i64)thresh1, (v2i64)thresh0); in vpx_lpf_vertical_4_dual_msa()
128 b_limit0 = (v16u8)__msa_ilvr_d((v2i64)b_limit1, (v2i64)b_limit0); in vpx_lpf_vertical_4_dual_msa()
132 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0); in vpx_lpf_vertical_4_dual_msa()
Dloopfilter_8_msa.c38 flat = (v16u8)__msa_ilvr_d((v2i64)zero, (v2i64)flat); in vpx_lpf_horizontal_8_msa()
100 thresh = (v16u8)__msa_ilvr_d((v2i64)tmp, (v2i64)thresh); in vpx_lpf_horizontal_8_dual_msa()
104 b_limit = (v16u8)__msa_ilvr_d((v2i64)tmp, (v2i64)b_limit); in vpx_lpf_horizontal_8_dual_msa()
108 limit = (v16u8)__msa_ilvr_d((v2i64)tmp, (v2i64)limit); in vpx_lpf_horizontal_8_dual_msa()
183 flat = (v16u8)__msa_ilvr_d((v2i64)zero, (v2i64)flat); in vpx_lpf_vertical_8_msa()
258 thresh = (v16u8)__msa_ilvr_d((v2i64)vec0, (v2i64)thresh); in vpx_lpf_vertical_8_dual_msa()
262 b_limit = (v16u8)__msa_ilvr_d((v2i64)vec0, (v2i64)b_limit); in vpx_lpf_vertical_8_dual_msa()
266 limit = (v16u8)__msa_ilvr_d((v2i64)vec0, (v2i64)limit); in vpx_lpf_vertical_8_dual_msa()
Dmacros_msa.h1132 out0 = (RTYPE)__msa_ilvr_d((v2i64)(in0), (v2i64)(in1)); \
1133 out1 = (RTYPE)__msa_ilvr_d((v2i64)(in2), (v2i64)(in3)); \
1142 out2 = (RTYPE)__msa_ilvr_d((v2i64)(in4), (v2i64)(in5)); \
1814 out0 = (v8i16)__msa_ilvr_d((v2i64)tmp1_m, (v2i64)tmp0_m); \
1816 out2 = (v8i16)__msa_ilvr_d((v2i64)tmp3_m, (v2i64)tmp2_m); \
1881 out0 = (v4i32)__msa_ilvr_d((v2i64)s2_m, (v2i64)s0_m); \
1883 out2 = (v4i32)__msa_ilvr_d((v2i64)s3_m, (v2i64)s1_m); \
Ddeblock_msa.c106 in8 = (v16u8)__msa_ilvr_d((v2i64)temp1, (v2i64)temp0); \
109 in10 = (v16u8)__msa_ilvr_d((v2i64)temp3, (v2i64)temp2); \
Dloopfilter_16_msa.c457 flat = (v16u8)__msa_ilvr_d((v2i64)zero, (v2i64)flat); in mb_lpf_horizontal_edge()
786 flat = (v16u8)__msa_ilvr_d((v2i64)zero, (v2i64)flat); in vt_lpf_t4_and_t8_8w()
/external/libaom/libaom/aom_dsp/mips/
Dloopfilter_4_msa.c55 thresh0 = (v16u8)__msa_ilvr_d((v2i64)thresh1, (v2i64)thresh0); in aom_lpf_horizontal_4_dual_msa()
59 b_limit0 = (v16u8)__msa_ilvr_d((v2i64)b_limit1, (v2i64)b_limit0); in aom_lpf_horizontal_4_dual_msa()
63 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0); in aom_lpf_horizontal_4_dual_msa()
124 thresh0 = (v16u8)__msa_ilvr_d((v2i64)thresh1, (v2i64)thresh0); in aom_lpf_vertical_4_dual_msa()
128 b_limit0 = (v16u8)__msa_ilvr_d((v2i64)b_limit1, (v2i64)b_limit0); in aom_lpf_vertical_4_dual_msa()
132 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0); in aom_lpf_vertical_4_dual_msa()
Dloopfilter_8_msa.c38 flat = (v16u8)__msa_ilvr_d((v2i64)zero, (v2i64)flat); in aom_lpf_horizontal_8_msa()
100 thresh = (v16u8)__msa_ilvr_d((v2i64)tmp, (v2i64)thresh); in aom_lpf_horizontal_8_dual_msa()
104 b_limit = (v16u8)__msa_ilvr_d((v2i64)tmp, (v2i64)b_limit); in aom_lpf_horizontal_8_dual_msa()
108 limit = (v16u8)__msa_ilvr_d((v2i64)tmp, (v2i64)limit); in aom_lpf_horizontal_8_dual_msa()
183 flat = (v16u8)__msa_ilvr_d((v2i64)zero, (v2i64)flat); in aom_lpf_vertical_8_msa()
258 thresh = (v16u8)__msa_ilvr_d((v2i64)vec0, (v2i64)thresh); in aom_lpf_vertical_8_dual_msa()
262 b_limit = (v16u8)__msa_ilvr_d((v2i64)vec0, (v2i64)b_limit); in aom_lpf_vertical_8_dual_msa()
266 limit = (v16u8)__msa_ilvr_d((v2i64)vec0, (v2i64)limit); in aom_lpf_vertical_8_dual_msa()
Dmacros_msa.h1243 out0 = (RTYPE)__msa_ilvr_d((v2i64)(in0), (v2i64)(in1)); \
1244 out1 = (RTYPE)__msa_ilvr_d((v2i64)(in2), (v2i64)(in3)); \
1253 out2 = (RTYPE)__msa_ilvr_d((v2i64)(in4), (v2i64)(in5)); \
1901 out0 = (v8i16)__msa_ilvr_d((v2i64)tmp1_m, (v2i64)tmp0_m); \
1903 out2 = (v8i16)__msa_ilvr_d((v2i64)tmp3_m, (v2i64)tmp2_m); \
1968 out0 = (v4i32)__msa_ilvr_d((v2i64)s2_m, (v2i64)s0_m); \
1970 out2 = (v4i32)__msa_ilvr_d((v2i64)s3_m, (v2i64)s1_m); \
Dloopfilter_16_msa.c456 flat = (v16u8)__msa_ilvr_d((v2i64)zero, (v2i64)flat); in mb_lpf_horizontal_edge()
785 flat = (v16u8)__msa_ilvr_d((v2i64)zero, (v2i64)flat); in aom_vt_lpf_t4_and_t8_8w()
/external/libvpx/libvpx/vp8/common/mips/msa/
Dloopfilter_filters_msa.c223 thresh0 = (v16u8)__msa_ilvr_d((v2i64)thresh1, (v2i64)thresh0); in loop_filter_horizontal_4_dual_msa()
227 b_limit0 = (v16u8)__msa_ilvr_d((v2i64)b_limit1, (v2i64)b_limit0); in loop_filter_horizontal_4_dual_msa()
231 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0); in loop_filter_horizontal_4_dual_msa()
263 thresh0 = (v16u8)__msa_ilvr_d((v2i64)thresh1, (v2i64)thresh0); in loop_filter_vertical_4_dual_msa()
267 b_limit0 = (v16u8)__msa_ilvr_d((v2i64)b_limit1, (v2i64)b_limit0); in loop_filter_vertical_4_dual_msa()
271 limit0 = (v16u8)__msa_ilvr_d((v2i64)limit1, (v2i64)limit0); in loop_filter_vertical_4_dual_msa()
Dvp8_macros_msa.h1060 out0 = (RTYPE)__msa_ilvr_d((v2i64)(in0), (v2i64)(in1)); \
1061 out1 = (RTYPE)__msa_ilvr_d((v2i64)(in2), (v2i64)(in3)); \
1690 out0 = (v4i32)__msa_ilvr_d((v2i64)s2_m, (v2i64)s0_m); \
1692 out2 = (v4i32)__msa_ilvr_d((v2i64)s3_m, (v2i64)s1_m); \
Dsixtap_filter_msa.c789 src2110 = (v16i8)__msa_ilvr_d((v2i64)src21_r, (v2i64)src10_r); in common_vt_4t_4w_msa()
796 src4332 = (v16i8)__msa_ilvr_d((v2i64)src43_r, (v2i64)src32_r); in common_vt_4t_4w_msa()
803 src2110 = (v16i8)__msa_ilvr_d((v2i64)src65_r, (v2i64)src54_r); in common_vt_4t_4w_msa()
/external/libyuv/files/source/
Drotate_msa.cc48 out0 = (v16u8)__msa_ilvr_d((v2i64)in1, (v2i64)in0); \
50 out2 = (v16u8)__msa_ilvr_d((v2i64)in3, (v2i64)in2); \
/external/libvpx/libvpx/third_party/libyuv/source/
Drotate_msa.cc48 out0 = (v16u8)__msa_ilvr_d((v2i64)in1, (v2i64)in0); \
50 out2 = (v16u8)__msa_ilvr_d((v2i64)in3, (v2i64)in2); \
/external/webp/src/dsp/
Dmsa_macro.h916 out0 = (RTYPE)__msa_ilvr_d((v2i64)in0, (v2i64)in1); \
917 out1 = (RTYPE)__msa_ilvr_d((v2i64)in2, (v2i64)in3); \
1338 out0 = (RTYPE)__msa_ilvr_d((v2i64)s2_m, (v2i64)s0_m); \
1340 out2 = (RTYPE)__msa_ilvr_d((v2i64)s3_m, (v2i64)s1_m); \
/external/llvm-project/clang/lib/Headers/
Dmsa.h376 #define __msa_ilvr_d __builtin_msa_ilvr_d macro
/external/llvm-project/clang/test/CodeGen/
Dbuiltins-mips-msa.c511 v2i64_r = __msa_ilvr_d(v2i64_a, v2i64_b); // CHECK: call <2 x i64> @llvm.mips.ilvr.d( in test()