Searched refs:__opmask_reg (Results 1 – 4 of 4) sorted by relevance
162 typedef struct { uint8_t __opmask_reg[8]; } __i386_opmask_reg; member
457 m_state.context.fpu.avx512f.__fpu_k0.__opmask_reg[i] = '0'; in GetFPUState()458 m_state.context.fpu.avx512f.__fpu_k1.__opmask_reg[i] = '1'; in GetFPUState()459 m_state.context.fpu.avx512f.__fpu_k2.__opmask_reg[i] = '2'; in GetFPUState()460 m_state.context.fpu.avx512f.__fpu_k3.__opmask_reg[i] = '3'; in GetFPUState()461 m_state.context.fpu.avx512f.__fpu_k4.__opmask_reg[i] = '4'; in GetFPUState()462 m_state.context.fpu.avx512f.__fpu_k5.__opmask_reg[i] = '5'; in GetFPUState()463 m_state.context.fpu.avx512f.__fpu_k6.__opmask_reg[i] = '6'; in GetFPUState()464 m_state.context.fpu.avx512f.__fpu_k7.__opmask_reg[i] = '7'; in GetFPUState()
193 typedef struct { uint8_t __opmask_reg[8]; } __x86_64_opmask_reg; member
353 m_state.context.fpu.avx512f.__fpu_k0.__opmask_reg[i] = '0'; in GetFPUState()354 m_state.context.fpu.avx512f.__fpu_k1.__opmask_reg[i] = '1'; in GetFPUState()355 m_state.context.fpu.avx512f.__fpu_k2.__opmask_reg[i] = '2'; in GetFPUState()356 m_state.context.fpu.avx512f.__fpu_k3.__opmask_reg[i] = '3'; in GetFPUState()357 m_state.context.fpu.avx512f.__fpu_k4.__opmask_reg[i] = '4'; in GetFPUState()358 m_state.context.fpu.avx512f.__fpu_k5.__opmask_reg[i] = '5'; in GetFPUState()359 m_state.context.fpu.avx512f.__fpu_k6.__opmask_reg[i] = '6'; in GetFPUState()360 m_state.context.fpu.avx512f.__fpu_k7.__opmask_reg[i] = '7'; in GetFPUState()