Searched refs:__xmm_reg (Results 1 – 5 of 5) sorted by relevance
426 m_state.context.fpu.no_avx.__fpu_xmm0.__xmm_reg[i] = '0'; in GetFPUState()427 m_state.context.fpu.no_avx.__fpu_xmm1.__xmm_reg[i] = '1'; in GetFPUState()428 m_state.context.fpu.no_avx.__fpu_xmm2.__xmm_reg[i] = '2'; in GetFPUState()429 m_state.context.fpu.no_avx.__fpu_xmm3.__xmm_reg[i] = '3'; in GetFPUState()430 m_state.context.fpu.no_avx.__fpu_xmm4.__xmm_reg[i] = '4'; in GetFPUState()431 m_state.context.fpu.no_avx.__fpu_xmm5.__xmm_reg[i] = '5'; in GetFPUState()432 m_state.context.fpu.no_avx.__fpu_xmm6.__xmm_reg[i] = '6'; in GetFPUState()433 m_state.context.fpu.no_avx.__fpu_xmm7.__xmm_reg[i] = '7'; in GetFPUState()445 m_state.context.fpu.avx.__fpu_ymmh0.__xmm_reg[i] = '0'; in GetFPUState()446 m_state.context.fpu.avx.__fpu_ymmh1.__xmm_reg[i] = '1'; in GetFPUState()[all …]
80 typedef struct { uint8_t __xmm_reg[16]; } __i386_xmm_reg; member
308 m_state.context.fpu.no_avx.__fpu_xmm0.__xmm_reg[i] = '0'; in GetFPUState()309 m_state.context.fpu.no_avx.__fpu_xmm1.__xmm_reg[i] = '1'; in GetFPUState()310 m_state.context.fpu.no_avx.__fpu_xmm2.__xmm_reg[i] = '2'; in GetFPUState()311 m_state.context.fpu.no_avx.__fpu_xmm3.__xmm_reg[i] = '3'; in GetFPUState()312 m_state.context.fpu.no_avx.__fpu_xmm4.__xmm_reg[i] = '4'; in GetFPUState()313 m_state.context.fpu.no_avx.__fpu_xmm5.__xmm_reg[i] = '5'; in GetFPUState()314 m_state.context.fpu.no_avx.__fpu_xmm6.__xmm_reg[i] = '6'; in GetFPUState()315 m_state.context.fpu.no_avx.__fpu_xmm7.__xmm_reg[i] = '7'; in GetFPUState()316 m_state.context.fpu.no_avx.__fpu_xmm8.__xmm_reg[i] = '8'; in GetFPUState()317 m_state.context.fpu.no_avx.__fpu_xmm9.__xmm_reg[i] = '9'; in GetFPUState()[all …]
86 typedef struct { uint8_t __xmm_reg[16]; } __x86_64_xmm_reg; member
103 pub __xmm_reg: [::c_char; 16],