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Searched refs:add_sched (Results 1 – 14 of 14) sorted by relevance

/external/perfetto/test/trace_processor/process_tracking/
Dsynth_process_tracking.py32 trace.add_sched(ts=1, prev_pid=0, next_pid=10, next_comm='p1-t0')
33 trace.add_sched(
35 trace.add_sched(
37 trace.add_sched(ts=4, prev_pid=12, next_pid=0, prev_comm='p1-t2')
50 trace.add_sched(ts=10, prev_pid=0, next_pid=20, next_comm='p2-t0')
51 trace.add_sched(
55 trace.add_sched(
57 trace.add_sched(ts=14, prev_pid=22, next_pid=0, prev_comm='p2-t2')
70 trace.add_sched(ts=20, prev_pid=0, next_pid=30, next_comm='p3-t0')
71 trace.add_sched(
[all …]
Dprocess_tracking_short_lived_2.py35 trace.add_sched(ts=16, prev_pid=10, next_pid=11, next_comm='child')
Dprocess_tracking_short_lived_1.py34 trace.add_sched(ts=16, prev_pid=10, next_pid=11, next_comm='child')
Dprocess_tracking_exec.py33 trace.add_sched(ts=16, prev_pid=10, next_pid=11, next_comm='child')
/external/perfetto/test/trace_processor/common/
Dsynth_1.py28 trace.add_sched(ts=1, prev_pid=1, next_pid=3)
30 trace.add_sched(ts=100, prev_pid=3, next_pid=2)
31 trace.add_sched(ts=115, prev_pid=2, next_pid=3)
34 trace.add_sched(ts=50, prev_pid=4, next_pid=1)
35 trace.add_sched(ts=120, prev_pid=1, next_pid=2)
36 trace.add_sched(ts=170, prev_pid=2, next_pid=0)
37 trace.add_sched(ts=250, prev_pid=0, next_pid=2)
38 trace.add_sched(ts=390, prev_pid=2, next_pid=4)
/external/perfetto/test/trace_processor/parsing/
Dftrace_with_tracing_start.py29 trace.add_sched(ts=50, prev_pid=1, next_pid=2, prev_comm='t1', next_comm='t2')
30 trace.add_sched(ts=60, prev_pid=2, next_pid=1, prev_comm='t2', next_comm='t1')
31 trace.add_sched(ts=70, prev_pid=1, next_pid=2, prev_comm='t1', next_comm='t2')
32 trace.add_sched(
38 trace.add_sched(
40 trace.add_sched(ts=90, prev_pid=1, next_pid=2, prev_comm='t1', next_comm='t2')
41 trace.add_sched(ts=100, prev_pid=2, next_pid=1, prev_comm='t2', next_comm='t1')
42 trace.add_sched(ts=110, prev_pid=1, next_pid=2, prev_comm='t1', next_comm='t2')
/external/perfetto/test/trace_processor/startup/
Dandroid_startup_cpu.py47 trace.add_sched(ts=10 * 1000000, prev_pid=0, next_pid=1)
48 trace.add_sched(ts=12 * 1000000, prev_pid=1, next_pid=3)
49 trace.add_sched(ts=16 * 1000000, prev_pid=3, next_pid=4)
50 trace.add_sched(ts=17 * 1000000, prev_pid=4, next_pid=2)
51 trace.add_sched(ts=19 * 1000000, prev_pid=2, next_pid=0)
55 trace.add_sched(ts=11 * 1000000, prev_pid=0, next_pid=5)
56 trace.add_sched(ts=13 * 1000000, prev_pid=5, next_pid=6)
57 trace.add_sched(ts=16 * 1000000, prev_pid=6, next_pid=3)
58 trace.add_sched(ts=18 * 1000000, prev_pid=3, next_pid=0)
Dandroid_startup.py44 trace.add_sched(ts=110, prev_pid=0, next_pid=3)
46 trace.add_sched(ts=120, prev_pid=3, next_pid=0, prev_state='S')
48 trace.add_sched(ts=130, prev_pid=0, next_pid=3)
50 trace.add_sched(ts=130, prev_pid=3, next_pid=4)
56 trace.add_sched(ts=160, prev_pid=4, next_pid=0, prev_state='R')
58 trace.add_sched(ts=209, prev_pid=0, next_pid=4)
60 trace.add_sched(ts=210, prev_pid=4, next_pid=0)
94 trace.add_sched(ts=160, prev_pid=0, next_pid=1)
95 trace.add_sched(ts=200, prev_pid=1, next_pid=0)
Dandroid_startup_breakdown.py101 trace.add_sched(ts=to_s(100), prev_pid=0, next_pid=2)
102 trace.add_sched(ts=to_s(115), prev_pid=2, next_pid=0)
103 trace.add_sched(ts=to_s(120), prev_pid=0, next_pid=2)
104 trace.add_sched(ts=to_s(125), prev_pid=2, next_pid=1)
105 trace.add_sched(ts=to_s(150), prev_pid=1, next_pid=2)
106 trace.add_sched(ts=to_s(160), prev_pid=2, next_pid=1)
107 trace.add_sched(ts=to_s(180), prev_pid=1, next_pid=3)
108 trace.add_sched(ts=to_s(205), prev_pid=3, next_pid=2)
109 trace.add_sched(ts=to_s(220), prev_pid=2, next_pid=0)
Dandroid_startup_attribution.py109 trace.add_sched(ts=155, prev_pid=0, next_pid=JIT_TID)
110 trace.add_sched(ts=165, prev_pid=JIT_TID, next_pid=0)
116 trace.add_sched(ts=170, prev_pid=0, next_pid=JIT_TID)
117 trace.add_sched(ts=175, prev_pid=JIT_TID, next_pid=0, prev_state='R')
118 trace.add_sched(ts=185, prev_pid=0, next_pid=JIT_TID)
119 trace.add_sched(ts=190, prev_pid=JIT_TID, next_pid=0)
144 trace.add_sched(ts=310, prev_pid=0, next_pid=GC_TID)
146 trace.add_sched(ts=325, prev_pid=GC_TID, next_pid=GC2_TID)
148 trace.add_sched(ts=350, prev_pid=GC2_TID, next_pid=GC_TID)
150 trace.add_sched(ts=360, prev_pid=GC_TID, next_pid=0)
/external/perfetto/test/trace_processor/chrome/
Destimated_power_by_combined_rail_mode.py121 trace.add_sched(ts=0, prev_pid=0, next_pid=thread_tid1)
124 trace.add_sched(ts=ms_to_ns(20), prev_pid=thread_tid1, next_pid=0)
125 trace.add_sched(ts=ms_to_ns(30), prev_pid=0, next_pid=thread_tid1)
128 trace.add_sched(ts=ms_to_ns(40), prev_pid=thread_tid1, next_pid=0)
131 trace.add_sched(ts=0, prev_pid=0, next_pid=thread_tid2)
133 trace.add_sched(ts=ms_to_ns(10), prev_pid=thread_tid2, next_pid=0)
134 trace.add_sched(ts=ms_to_ns(35), prev_pid=0, next_pid=thread_tid2)
136 trace.add_sched(ts=ms_to_ns(47), prev_pid=thread_tid2, next_pid=0)
/external/perfetto/test/trace_processor/graphics/
Dandroid_jank.py74 trace.add_sched(ts=1_000_000, prev_pid=0, next_pid=1000)
75 trace.add_sched(ts=10_000_000, prev_pid=1000, next_pid=0, prev_state='R')
76 trace.add_sched(ts=10_500_000, prev_pid=0, next_pid=0)
77 trace.add_sched(ts=19_500_000, prev_pid=0, next_pid=1000)
78 trace.add_sched(ts=20_500_000, prev_pid=1000, next_pid=0, prev_state='R')
106 trace.add_sched(ts=101_000_000, prev_pid=0, next_pid=2000)
107 trace.add_sched(ts=120_000_000, prev_pid=2000, next_pid=0, prev_state='R')
108 trace.add_sched(ts=120_500_000, prev_pid=0, next_pid=0)
Dandroid_sysui_cuj.py213 trace.add_sched(ts=39_000_000, prev_pid=0, next_pid=PID)
214 trace.add_sched(ts=53_000_000, prev_pid=PID, next_pid=0, prev_state='R')
217 trace.add_sched(ts=54_000_000, prev_pid=0, next_pid=RTID)
218 trace.add_sched(ts=59_000_000, prev_pid=RTID, next_pid=0, prev_state='R')
231 trace.add_sched(ts=70_000_000, prev_pid=0, next_pid=PID)
232 trace.add_sched(ts=71_000_000, prev_pid=PID, next_pid=0, prev_state='R')
235 trace.add_sched(ts=78_000_000, prev_pid=0, next_pid=RTID)
236 trace.add_sched(ts=78_500_000, prev_pid=RTID, next_pid=0, prev_state='R')
237 trace.add_sched(ts=78_500_000, prev_pid=0, next_pid=0)
238 trace.add_sched(ts=88_000_000, prev_pid=0, next_pid=RTID)
[all …]
/external/perfetto/test/
Dsynth_common.py87 def add_sched(self, member in Trace