| /external/llvm/test/CodeGen/AArch64/ |
| D | dp2.ll | 26 ; CHECK: {{asr|asrv}} {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
114 ; CHECK: {{asr|asrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
166 ; CHECK: {{asr|asrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | dp2.ll | 26 ; CHECK: {{asr|asrv}} {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
114 ; CHECK: {{asr|asrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
166 ; CHECK: {{asr|asrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-arithmetic-encoding.s | 394 asrv w1, w2, w3
395 asrv x1, x2, x3
|
| D | basic-a64-instructions.s | 1507 asrv w23, w24, w25
1508 asrv x26, x27, x28
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-arithmetic-encoding.s | 394 asrv w1, w2, w3
395 asrv x1, x2, x3
|
| D | basic-a64-instructions.s | 1524 asrv w23, w24, w25
1525 asrv x26, x27, x28
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 861 COMPARE(asrv(w12, w13, w14), "asr w12, w13, w14"); in TEST()
862 COMPARE(asrv(x15, x16, x17), "asr x15, x16, x17"); in TEST()
|
| D | test-trace-aarch64.cc | 71 __ asrv(w15, w16, w17); in GenerateTestSequenceBase() local
72 __ asrv(x18, x19, x20); in GenerateTestSequenceBase() local
|
| D | test-cpu-features-aarch64.cc | 194 TEST_NONE(asrv_0, asrv(w0, w1, w2))
195 TEST_NONE(asrv_1, asrv(x0, x1, x2))
|
| D | test-assembler-aarch64.cc | 6259 TEST(asrv) { in TEST() argument
6277 __ asrv(x0, x0, xzr); in TEST() local
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 730 void asrv(const Register& rd, const Register& rn, const Register& rm);
|
| D | assembler-aarch64.cc | 660 void Assembler::asrv(const Register& rd, in asrv() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 1088 asrv(rd, rn, rm); in Asr()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 707 def : ShiftAlias<"asrv", ASRVWr, GPR32>;
708 def : ShiftAlias<"asrv", ASRVXr, GPR64>;
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 93 void asrv(const Register& rd, const Register& rn, const Register& rm)
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 1440 def : ShiftAlias<"asrv", ASRVWr, GPR32>;
1441 def : ShiftAlias<"asrv", ASRVXr, GPR64>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 1297 def : ShiftAlias<"asrv", ASRVWr, GPR32>;
1298 def : ShiftAlias<"asrv", ASRVXr, GPR64>;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12477 "asr\004asrd\004asrr\004asrv\005autda\005autdb\006autdza\006autdzb\005au"
12921 …{ 148 /* asrv */, AArch64::ASRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR32, MCK_G…
12922 …{ 148 /* asrv */, AArch64::ASRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_G…
20294 …{ 148 /* asrv */, AArch64::ASRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR32, MCK_G…
20295 …{ 148 /* asrv */, AArch64::ASRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR64, MCK_G…
|