Searched refs:buildSExtInReg (Results 1 – 4 of 4) sorted by relevance
| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 614 MachineInstrBuilder buildSExtInReg(const DstOp &Res, const SrcOp &Op, int64_t ImmOp) { in buildSExtInReg() function
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1625 auto ExtLo = B.buildSExtInReg(S32, Bitcast, 16); in unpackV2S16ToS32()
2498 B.buildSExtInReg(DstRegs[0], SrcRegs[0], Amt); in applyMappingImpl()
2505 B.buildSExtInReg(DstRegs[1], DstRegs[0], Amt - 32); in applyMappingImpl()
|
| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 2829 Builder.buildSExtInReg(MI.getOperand(0).getReg(), Src, Size - ShiftAmt); in applyAshShlToSextInreg()
|
| D | LegalizerHelper.cpp | 3940 R = MIRBuilder.buildSExtInReg(NarrowTy, R, Imm).getReg(0); in fewerElementsVectorSextInReg()
|