| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | csel.ll | 174 ; CHECK-NEXT: csneg r0, r1, r2, gt
187 ; CHECK-NEXT: csneg r0, r2, r1, le
200 ; CHECK-NEXT: csneg r0, r2, r1, le
213 ; CHECK-NEXT: csneg r0, r2, r1, ge
226 ; CHECK-NEXT: csneg r0, r2, r1, ge
239 ; CHECK-NEXT: csneg r0, r2, r1, ls
252 ; CHECK-NEXT: csneg r0, r2, r1, ls
265 ; CHECK-NEXT: csneg r0, r2, r1, hs
278 ; CHECK-NEXT: csneg r0, r2, r1, hs
291 ; CHECK-NEXT: csneg r0, r2, r1, ne
[all …]
|
| /external/libhevc/common/arm64/ |
| D | ihevc_deblk_luma_horz.s | 137 csneg x9,x9,x9,pl
142 csneg x8,x8,x8,pl // dp0 value is stored in x8
166 csneg x12,x12,x12,pl
172 csneg x11,x11,x11,pl // dp3 value is stored in x8
228 csneg x2,x2,x2,pl
231 csneg x8,x8,x8,pl
240 csneg x7,x7,x7,pl
284 csneg x8,x8,x8,pl
288 csneg x2,x2,x2,pl
298 csneg x7,x7,x7,pl
|
| D | ihevc_deblk_luma_vert.s | 130 csneg x9,x9,x9,pl
140 csneg x8,x8,x8,pl
165 csneg x12,x12,x12,pl
171 csneg x11,x11,x11,pl // dp3 value is stored in x8
226 csneg x8,x8,x8,pl
229 csneg x2,x2,x2,pl
239 csneg x7,x7,x7,pl
279 csneg x8,x8,x8,pl
283 csneg x2,x2,x2,pl
292 csneg x7,x7,x7,pl
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | mve-scalar-shift.s | 64 csneg lr, r10, r10, lo label
90 # CHECK: csneg lr, r1, r11, vc @ encoding: [0x51,0xea,0x7b,0xbe]
91 # CHECK-NOMVE: csneg lr, r1, r11, vc @ encoding: [0x51,0xea,0x7b,0xbe]
92 csneg lr, r1, r11, vc label
|
| D | thumbv8.1m.s | 1083 csneg lr, r10, r10, lo label
1141 csneg r0, sp, r1, eq label
1143 csneg r0, pc, r1, eq label
1164 csneg r0, r0, r1, gt label
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | cond-sel.ll | 175 ; CHECK: csneg {{w[0-9]+}}, [[LHS]], [[RHS]], ls
183 ; CHECK: csneg {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
192 ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
200 ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
|
| D | arm64-csel.ll | 84 ; CHECK-next: csneg
160 ; CHECK: csneg w0, w1, w2, ne
171 ; CHECK: csneg x0, x1, x2, ne
|
| D | arm64-early-ifcvt.ll | 186 ; CHECK-NEXT: csneg w0, w1, w0, eq
204 ; CHECK-NEXT: csneg x0, x1, x0, eq
222 ; CHECK-NEXT: csneg w0, w1, w0, ne
240 ; CHECK-NEXT: csneg x0, x1, x0, ne
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | cond-sel.ll | 175 ; CHECK: csneg {{w[0-9]+}}, [[LHS]], [[RHS]], ls
183 ; CHECK: csneg {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
192 ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
200 ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
|
| D | arm64-csel.ll | 83 ; CHECK-next: csneg
159 ; CHECK: csneg w0, w1, w2, ne
170 ; CHECK: csneg x0, x1, x2, ne
|
| D | arm64-early-ifcvt.ll | 186 ; CHECK-NEXT: csneg w0, w1, w0, eq
204 ; CHECK-NEXT: csneg x0, x1, x0, eq
222 ; CHECK-NEXT: csneg w0, w1, w0, ne
240 ; CHECK-NEXT: csneg x0, x1, x0, ne
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | thumbv8.1m.s | 35 # CHECK: csneg lr, r1, r11, vc @ encoding: [0x51,0xea,0x7b,0xbe]
|
| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 406 csneg w1, w0, w19, ne label
407 csneg wzr, w5, w9, eq label
408 csneg w9, wzr, w30, gt label
409 csneg w1, w28, wzr, mi label
410 csneg x19, x23, x29, lt label
411 csneg xzr, x3, x4, ge label
412 csneg x5, xzr, x6, hs label
413 csneg x7, x8, xzr, lo label
442 csneg x4, x8, x8, al label
1738 # CHECK-NEXT: 1 3 0.50 csneg w1, w0, w19, ne
[all …]
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 524 0x01,0x14,0x93,0x5a = csneg w1, w0, w19, ne
525 0xbf,0x04,0x89,0x5a = csneg wzr, w5, w9, eq
526 0xe9,0xc7,0x9e,0x5a = csneg w9, wzr, w30, gt
527 0x81,0x47,0x9f,0x5a = csneg w1, w28, wzr, mi
528 0xf3,0xb6,0x9d,0xda = csneg x19, x23, x29, lt
529 0x7f,0xa4,0x84,0xda = csneg xzr, x3, x4, ge
530 0xe5,0x27,0x86,0xda = csneg x5, xzr, x6, hs
531 0x07,0x35,0x9f,0xda = csneg x7, x8, xzr, lo
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 1383 csneg w1, w0, w19, ne
1384 csneg wzr, w5, w9, eq
1385 csneg w9, wzr, w30, gt
1386 csneg w1, w28, wzr, mi
1392 csneg x19, x23, x29, lt
1393 csneg xzr, x3, x4, ge
1394 csneg x5, xzr, x6, cs
1395 csneg x7, x8, xzr, cc
|
| D | arm64-arithmetic-encoding.s | 556 csneg w1, w2, w3, eq
557 csneg x1, x2, x3, eq
|
| D | basic-a64-diagnostics.s | 1389 csneg w20, w21, wsp, mi
1390 csneg x0, sp, x29, le
|
| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 1383 csneg w1, w0, w19, ne
1384 csneg wzr, w5, w9, eq
1385 csneg w9, wzr, w30, gt
1386 csneg w1, w28, wzr, mi
1392 csneg x19, x23, x29, lt
1393 csneg xzr, x3, x4, ge
1394 csneg x5, xzr, x6, cs
1395 csneg x7, x8, xzr, cc
|
| D | arm64-arithmetic-encoding.s | 556 csneg w1, w2, w3, eq
557 csneg x1, x2, x3, eq
|
| D | basic-a64-diagnostics.s | 1375 csneg w20, w21, wsp, mi
1376 csneg x0, sp, x29, le
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 524 # CHECK: csneg w1, w2, w3, eq
526 # CHECK: csneg x1, x2, x3, eq
|
| D | basic-a64-instructions.txt | 928 # CHECK: csneg w1, w0, w19, ne
929 # CHECK: csneg wzr, w5, w9, eq
930 # CHECK: csneg w9, wzr, w30, gt
931 # CHECK: csneg w1, w28, wzr, mi
932 # CHECK: csneg x19, x23, x29, lt
933 # CHECK: csneg xzr, x3, x4, ge
934 # CHECK: csneg x5, xzr, x6, hs
935 # CHECK: csneg x7, x8, xzr, lo
1002 # CHECK: csneg x4, x8, x8, al
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 524 # CHECK: csneg w1, w2, w3, eq
526 # CHECK: csneg x1, x2, x3, eq
|
| D | basic-a64-instructions.txt | 932 # CHECK: csneg w1, w0, w19, ne
933 # CHECK: csneg wzr, w5, w9, eq
934 # CHECK: csneg w9, wzr, w30, gt
935 # CHECK: csneg w1, w28, wzr, mi
936 # CHECK: csneg x19, x23, x29, lt
937 # CHECK: csneg xzr, x3, x4, ge
938 # CHECK: csneg x5, xzr, x6, hs
939 # CHECK: csneg x7, x8, xzr, lo
1006 # CHECK: csneg x4, x8, x8, al
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 2169 COMPARE(csneg(w18, w19, w20, vs), "csneg w18, w19, w20, vs"); in TEST()
2170 COMPARE(csneg(x21, x22, x23, vc), "csneg x21, x22, x23, vc"); in TEST()
2188 COMPARE(csneg(x6, x7, x8, al), "csneg x6, x7, x8, al"); in TEST()
2189 COMPARE(csneg(x7, x8, x9, nv), "csneg x7, x8, x9, nv"); in TEST()
|