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Searched refs:csrwi (Results 1 – 6 of 6) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/RISCV/
Dinline-asm.ll132 ; RV32I-NEXT: csrwi mstatus, 31
135 ; RV32I-NEXT: csrwi mstatus, 0
142 ; RV64I-NEXT: csrwi mstatus, 31
145 ; RV64I-NEXT: csrwi mstatus, 0
148 tail call void asm sideeffect "csrwi mstatus, $0", "K"(i32 31)
149 tail call void asm sideeffect "csrwi mstatus, $0", "K"(i32 0)
Dinline-asm-invalid.ll20 tail call void asm sideeffect "csrwi mstatus, $0", "K"(i32 32)
22 tail call void asm sideeffect "csrwi mstatus, $0", "K"(i32 -1)
/external/llvm-project/llvm/test/MC/RISCV/
Dcsr-aliases.s85 # CHECK-EXT-F-OFF: csrwi frm, 31
115 # CHECK-EXT-F-OFF: csrwi fflags, 31
Drvi-aliases-valid.s224 # CHECK-S-OBJ: csrwi 336, 15
225 csrwi 0x150, 0xf label
234 # CHECK-S-OBJ: csrwi 336, 7
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td669 def : InstAlias<"csrwi $csr, $imm", (CSRRWI X0, csr_sysreg:$csr, uimm5:$imm)>;
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td731 def : InstAlias<"csrwi $csr, $imm", (CSRRWI X0, csr_sysreg:$csr, uimm5:$imm)>;