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Searched refs:cvt2 (Results 1 – 10 of 10) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AArch64/
Dfcvt-fixed.ll19 %cvt2 = fptosi float %fix2 to i32
21 store volatile i32 %cvt2, i32* @var32
65 %cvt2 = fptoui float %fix2 to i32
67 store volatile i32 %cvt2, i32* @var32
113 %cvt2 = sitofp i32 %int to float
114 %fix2 = fdiv float %cvt2, 4294967296.0
159 %cvt2 = uitofp i32 %int to float
160 %fix2 = fdiv float %cvt2, 4294967296.0
/external/llvm/test/CodeGen/AArch64/
Dfcvt-fixed.ll19 %cvt2 = fptosi float %fix2 to i32
21 store volatile i32 %cvt2, i32* @var32
65 %cvt2 = fptoui float %fix2 to i32
67 store volatile i32 %cvt2, i32* @var32
113 %cvt2 = sitofp i32 %int to float
114 %fix2 = fdiv float %cvt2, 4294967296.0
159 %cvt2 = uitofp i32 %int to float
160 %fix2 = fdiv float %cvt2, 4294967296.0
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
Dfptosi.ll102 %cvt2 = fptosi double %a2 to i64
110 store i64 %cvt2, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @dst64, i32 0, i64 2), align 8
145 %cvt2 = fptosi double %a2 to i32
153 …store i32 %cvt2, i32* getelementptr inbounds ([16 x i32], [16 x i32]* @dst32, i32 0, i64 2), align…
179 %cvt2 = fptosi double %a2 to i16
187 …store i16 %cvt2, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @dst16, i32 0, i64 2), align…
234 %cvt2 = fptosi double %a2 to i8
242 store i8 %cvt2, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @dst8, i32 0, i64 2), align 1
335 %cvt2 = fptosi float %a2 to i64
343 store i64 %cvt2, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @dst64, i32 0, i64 2), align 8
[all …]
Dsitofp.ll112 %cvt2 = sitofp i64 %ld2 to double
116 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
201 %cvt2 = sitofp i64 %ld2 to double
209 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
265 %cvt2 = sitofp i32 %ld2 to double
269 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
327 %cvt2 = sitofp i32 %ld2 to double
335 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
391 %cvt2 = sitofp i16 %ld2 to double
395 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
[all …]
Duitofp.ll61 %cvt2 = uitofp i64 %ld2 to double
65 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
111 %cvt2 = uitofp i64 %ld2 to double
119 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
196 %cvt2 = uitofp i32 %ld2 to double
200 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
258 %cvt2 = uitofp i32 %ld2 to double
266 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
322 %cvt2 = uitofp i16 %ld2 to double
326 …store double %cvt2, double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64…
[all …]
Dfptoui.ll102 %cvt2 = fptoui double %a2 to i64
110 store i64 %cvt2, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @dst64, i32 0, i64 2), align 8
190 %cvt2 = fptoui double %a2 to i32
198 …store i32 %cvt2, i32* getelementptr inbounds ([16 x i32], [16 x i32]* @dst32, i32 0, i64 2), align…
224 %cvt2 = fptoui double %a2 to i16
232 …store i16 %cvt2, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @dst16, i32 0, i64 2), align…
279 %cvt2 = fptoui double %a2 to i8
287 store i8 %cvt2, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @dst8, i32 0, i64 2), align 1
380 %cvt2 = fptoui float %a2 to i64
388 store i64 %cvt2, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @dst64, i32 0, i64 2), align 8
[all …]
/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/
Dformat_utils.h314 simd16scalari cvt2 = _simd16_cvtepu8_epi32(src2); in Transpose_simd16() local
318 simd16scalari shl2 = _simd16_slli_epi32(cvt2, 16); in Transpose_simd16()
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dcvt_f32_ubyte.ll297 %cvt2 = uitofp i32 %mask.lshr.16 to float
305 %ins.2 = insertelement <4 x float> %ins.1, float %cvt2, i32 2
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dcvt_f32_ubyte.ll180 %cvt2 = uitofp i32 %mask.lshr.16 to float
188 %ins.2 = insertelement <4 x float> %ins.1, float %cvt2, i32 2
/external/llvm-project/llvm/test/CodeGen/X86/
Dvector-shuffle-combining.ll3049 %cvt2 = sext i8 %tmp3 to i16
3057 %tmp11 = insertelement <8 x i16> %tmp10, i16 %cvt2, i32 6