Searched refs:ds_info (Results 1 – 6 of 6) sorted by relevance
| /external/mesa3d/src/broadcom/vulkan/ |
| D | v3dv_pipeline.c | 2295 const VkPipelineDepthStencilStateCreateInfo *ds_info, in pack_cfg_bits() argument
2350 if (ds_info && ds_info->depthTestEnable && has_ds_attachment) { in pack_cfg_bits()
2351 config.z_updates_enable = ds_info->depthWriteEnable; in pack_cfg_bits()
2352 config.depth_test_function = ds_info->depthCompareOp; in pack_cfg_bits()
2362 ds_info ? ds_info->stencilTestEnable && has_ds_attachment: false; in pack_cfg_bits()
2440 const VkPipelineDepthStencilStateCreateInfo *ds_info) in pack_stencil_cfg() argument
2444 if (!ds_info || !ds_info->stencilTestEnable) in pack_stencil_cfg()
2460 memcmp(&ds_info->front, &ds_info->back, sizeof(ds_info->front))) in pack_stencil_cfg()
2469 true, true, &ds_info->front); in pack_stencil_cfg()
2473 true, false, &ds_info->front); in pack_stencil_cfg()
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| /external/mesa3d/src/freedreno/vulkan/ |
| D | tu_pipeline.c | 2463 const VkPipelineDepthStencilStateCreateInfo *ds_info = in tu_pipeline_builder_parse_depth_stencil() local
2472 if (ds_info->depthTestEnable) { in tu_pipeline_builder_parse_depth_stencil()
2475 A6XX_RB_DEPTH_CNTL_ZFUNC(tu6_compare_func(ds_info->depthCompareOp)) | in tu_pipeline_builder_parse_depth_stencil()
2481 if (ds_info->depthWriteEnable) in tu_pipeline_builder_parse_depth_stencil()
2485 if (ds_info->depthBoundsTestEnable) in tu_pipeline_builder_parse_depth_stencil()
2497 const VkStencilOpState *front = &ds_info->front; in tu_pipeline_builder_parse_depth_stencil()
2498 const VkStencilOpState *back = &ds_info->back; in tu_pipeline_builder_parse_depth_stencil()
2510 if (ds_info->stencilTestEnable) { in tu_pipeline_builder_parse_depth_stencil()
2538 A6XX_RB_Z_BOUNDS_MIN(ds_info->minDepthBounds), in tu_pipeline_builder_parse_depth_stencil()
2539 A6XX_RB_Z_BOUNDS_MAX(ds_info->maxDepthBounds)); in tu_pipeline_builder_parse_depth_stencil()
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| /external/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_draw.c | 191 shader_info *ds_info = &emit.key.ds->nir->info; in fd6_draw_vbo() local
192 emit.key.key.tessellation = ir3_tess_mode(ds_info->tess.primitive_mode); in fd6_draw_vbo()
245 shader_info *ds_info = &emit.ds->shader->nir->info; in fd6_draw_vbo() local
248 switch (ds_info->tess.primitive_mode) { in fd6_draw_vbo()
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| D | fd6_program.c | 624 shader_info *ds_info = &ds->shader->nir->info; in setup_stateobj() local
627 if (ds_info->tess.point_mode) in setup_stateobj()
629 else if (ds_info->tess.primitive_mode == GL_ISOLINES) in setup_stateobj()
631 else if (ds_info->tess.ccw) in setup_stateobj()
636 OUT_RING(ring, A6XX_PC_TESS_CNTL_SPACING(fd6_gl2spacing(ds_info->tess.spacing)) | in setup_stateobj()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_pipeline.c | 1748 const VkPipelineDepthStencilStateCreateInfo *ds_info in radv_pipeline_init_depth_stencil_state() local
1761 if (ds_info) { in radv_pipeline_init_depth_stencil_state()
1763 db_depth_control = S_028800_Z_ENABLE(ds_info->depthTestEnable ? 1 : 0) | in radv_pipeline_init_depth_stencil_state()
1764 S_028800_Z_WRITE_ENABLE(ds_info->depthWriteEnable ? 1 : 0) | in radv_pipeline_init_depth_stencil_state()
1765 S_028800_ZFUNC(ds_info->depthCompareOp) | in radv_pipeline_init_depth_stencil_state()
1766 S_028800_DEPTH_BOUNDS_ENABLE(ds_info->depthBoundsTestEnable ? 1 : 0); in radv_pipeline_init_depth_stencil_state()
1769 if (has_stencil_attachment && ds_info->stencilTestEnable) { in radv_pipeline_init_depth_stencil_state()
1771 db_depth_control |= S_028800_STENCILFUNC(ds_info->front.compareOp); in radv_pipeline_init_depth_stencil_state()
1772 db_depth_control |= S_028800_STENCILFUNC_BF(ds_info->back.compareOp); in radv_pipeline_init_depth_stencil_state()
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| /external/mesa3d/src/intel/vulkan/ |
| D | genX_pipeline.c | 2271 const VkPipelineDepthStencilStateCreateInfo *ds_info = local
2302 emit_ds_state(pipeline, ds_info, dynamic_states, pass, subpass);
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