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Searched refs:fmask_offset (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/amd/common/
Dac_surface.h251 uint64_t fmask_offset; member
Dac_surface.c2112 surf->fmask_offset = surf->cmask_offset = 0; in ac_compute_surface()
2123 surf->fmask_offset = align64(surf->total_size, surf->fmask_alignment); in ac_compute_surface()
2124 surf->total_size = surf->fmask_offset + surf->fmask_size; in ac_compute_surface()
2486 if (surf->fmask_offset) in ac_surface_override_offset_stride()
2487 surf->fmask_offset += offset; in ac_surface_override_offset_stride()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_surface.c448 surf_ws->fmask_offset = align64(surf_ws->total_size, surf_ws->fmask_alignment); in radeon_winsys_surface_init()
449 surf_ws->total_size = surf_ws->fmask_offset + surf_ws->fmask_size; in radeon_winsys_surface_init()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c2298 if (tex->surface.fmask_offset) { in si_initialize_color_surface()
2545 if (tex->surface.fmask_offset) { in si_update_fb_dirtiness_after_rendering()
2749 if (tex->surface.fmask_offset) in si_set_framebuffer_state()
2936 if (tex->surface.fmask_offset) { in si_emit_framebuffer_state()
2937 cb_color_fmask = (tex->buffer.gpu_address + tex->surface.fmask_offset) >> 8; in si_emit_framebuffer_state()
2965 if (!tex->surface.fmask_offset) in si_emit_framebuffer_state()
3012 if (!tex->surface.fmask_offset) in si_emit_framebuffer_state()
3052 if (!tex->surface.fmask_offset) in si_emit_framebuffer_state()
3067 if (tex->surface.fmask_offset) { in si_emit_framebuffer_state()
3741 if (tex->surface.fmask_offset) { in gfx10_make_texture_descriptor()
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Dsi_texture.c500 tex->surface.fmask_offset = new_tex->surface.fmask_offset; in si_reallocate_texture_inplace()
850 if (tex->surface.fmask_offset) { in si_print_texture_info()
854 tex->surface.fmask_offset, tex->surface.fmask_size, in si_print_texture_info()
898 if (tex->surface.fmask_offset) in si_print_texture_info()
903 tex->surface.fmask_offset, tex->surface.fmask_size, tex->surface.fmask_alignment, in si_print_texture_info()
Dsi_compute_blit.c755 si_clear_buffer(sctx, tex, stex->surface.fmask_offset, stex->surface.fmask_size, in si_compute_expand_fmask()
Dsi_blit.c497 if (need_fmask_expand && tex->surface.fmask_offset && !tex->fmask_is_identity) { in si_blit_decompress_color()
Dsi_descriptors.c713 assert(fmask_desc || tex->surface.fmask_offset == 0); in si_set_shader_image_desc()
/external/mesa3d/src/amd/vulkan/
Dradv_image.c892 va = gpu_address + image->offset + image->planes[0].surface.fmask_offset; in gfx10_make_texture_descriptor()
1053 va = gpu_address + image->offset + image->planes[0].surface.fmask_offset; in si_make_texture_descriptor()
Dradv_private.h1938 return image->planes[0].surface.fmask_offset; in radv_image_has_fmask()
Dradv_meta_clear.c1498 uint64_t offset = image->offset + image->planes[0].surface.fmask_offset; in radv_clear_fmask()
Dradv_device.c6826 va = radv_buffer_get_va(iview->bo) + iview->image->offset + surf->fmask_offset; in radv_initialise_color_surface()