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Searched refs:getRATC (Results 1 – 9 of 9) sorted by relevance

/external/llvm-project/llvm/unittests/tools/llvm-exegesis/Mips/
DSnippetGeneratorTest.cpp43 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()
92 auto AllRegisters = State.getRATC().emptyRegisters(); in TEST_F()
/external/llvm-project/llvm/tools/llvm-exegesis/lib/
DSnippetRepetitor.cpp44 return State.getRATC().emptyRegisters(); in getReservedRegs()
94 return State.getRATC().getRegister(LoopCounter).aliasedBits(); in getReservedRegs()
DSnippetGenerator.cpp44 BitVector ForbiddenRegs = State.getRATC().reservedRegisters(); in generateConfigurations()
56 State.getRATC().getRegister(ScratchSpacePointerInReg).aliasedBits(); in generateConfigurations()
106 BitVector DefinedRegs = State.getRATC().emptyRegisters(); in computeRegisterInitialValues()
DLlvmState.h63 const RegisterAliasingTrackerCache &getRATC() const { return *RATC; } in getRATC() function
DLlvmState.cpp47 IC.reset(new InstructionsCache(getInstrInfo(), getRATC())); in LLVMState()
/external/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/
DSnippetGeneratorTest.cpp54 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()
154 auto AllRegisters = State.getRATC().emptyRegisters(); in TEST_F()
213 &Instr, Configs, State.getRATC().emptyRegisters()); in TEST_F()
364 State.getRATC().emptyRegisters()); in TEST_F()
419 &Instr, Benchmarks, State.getRATC().emptyRegisters()); in TEST_F()
DTargetTest.cpp145 EXPECT_TRUE(State.getRATC().reservedRegisters().test(X86::AH)); in TEST_F()
/external/llvm-project/llvm/unittests/tools/llvm-exegesis/PowerPC/
DSnippetGeneratorTest.cpp43 &Instr, State.getRATC().emptyRegisters()); in checkAndGetCodeTemplates()
/external/llvm-project/llvm/tools/llvm-exegesis/lib/X86/
DTarget.cpp322 State.getRATC().getRegister(BaseReg).aliasedBits(); in generateCodeTemplates()
381 State.getRATC().getRegister(BaseReg).aliasedBits()); in generateCodeTemplates()
383 State.getRATC().getRegister(IndexReg).aliasedBits()); in generateCodeTemplates()