| /external/llvm/test/CodeGen/PowerPC/ |
| D | named-reg-alloc-r13-64.ll | 4 define i64 @get_reg() nounwind {
9 ; CHECK-LABEL: @get_reg
12 ; CHECK-DARWIN-LABEL: @get_reg
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| D | named-reg-alloc-r1-64.ll | 4 define i64 @get_reg() nounwind {
9 ; CHECK-LABEL: @get_reg
12 ; CHECK-DARWIN-LABEL: @get_reg
|
| D | named-reg-alloc-r1.ll | 6 define i32 @get_reg() nounwind {
11 ; CHECK-LABEL: @get_reg
14 ; CHECK-DARWIN-LABEL: @get_reg
|
| D | named-reg-alloc-r13.ll | 5 define i32 @get_reg() nounwind {
12 ; CHECK-LABEL: @get_reg
|
| D | named-reg-alloc-r2.ll | 5 define i32 @get_reg() nounwind {
12 ; CHECK-LABEL: @get_reg
|
| D | named-reg-alloc-r2-64.ll | 4 define i64 @get_reg() nounwind {
|
| D | named-reg-alloc-r0.ll | 5 define i32 @get_reg() nounwind {
|
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | named-reg-alloc-r13-64.ll | 3 define i64 @get_reg() nounwind {
8 ; CHECK-LABEL: @get_reg
|
| D | named-reg-alloc-r1-64.ll | 3 define i64 @get_reg() nounwind {
8 ; CHECK-LABEL: get_reg
|
| D | named-reg-alloc-r1.ll | 4 define i32 @get_reg() nounwind {
9 ; CHECK-LABEL: @get_reg
|
| D | named-reg-alloc-r13.ll | 4 define i32 @get_reg() nounwind {
9 ; CHECK-LABEL: @get_reg
|
| D | named-reg-alloc-r2.ll | 4 define i32 @get_reg() nounwind {
11 ; CHECK-LABEL: @get_reg
|
| D | named-reg-alloc-r2-64.ll | 4 define i64 @get_reg() nounwind {
|
| D | named-reg-alloc-r0.ll | 5 define i32 @get_reg() nounwind {
|
| /external/linux-kselftest/tools/testing/selftests/kvm/lib/aarch64/ |
| D | processor.c | 260 get_reg(vm, vcpuid, ARM64_SYS_REG(SCTLR_EL1), &sctlr_el1); in aarch64_vcpu_setup()
261 get_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), &tcr_el1); in aarch64_vcpu_setup()
309 get_reg(vm, vcpuid, ARM64_CORE_REG(regs.pstate), &pstate); in vcpu_dump()
310 get_reg(vm, vcpuid, ARM64_CORE_REG(regs.pc), &pc); in vcpu_dump()
|
| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | ir2.c | 300 ra_reg(ctx, get_reg(instr), -1, false, 0); in sched_next()
374 ra_reg(ctx, get_reg(instr_v), -1, is_export(instr_v), instr_v->alu.write_mask); in sched_next()
377 ra_reg(ctx, get_reg(instr_s), -1, is_export(instr_s), instr_s->alu.write_mask); in sched_next()
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| D | ir2_assemble.c | 64 struct ir2_reg_component *comp = get_reg(instr)->comp; in alu_swizzle()
104 struct ir2_reg_component *comp = get_reg(instr)->comp; in alu_write_mask()
130 struct ir2_reg_component *comp = get_reg(instr)->comp; in fetch_dst_swiz()
146 return get_reg(instr)->idx; in dst_to_reg()
|
| D | ir2_private.h | 324 static inline struct ir2_reg * get_reg(struct ir2_instr *instr) in get_reg() function
|
| /external/linux-kselftest/tools/testing/selftests/kvm/include/aarch64/ |
| D | processor.h | 39 static inline void get_reg(struct kvm_vm *vm, uint32_t vcpuid, uint64_t id, uint64_t *addr) in get_reg() function
|
| /external/mesa3d/src/amd/compiler/ |
| D | aco_register_allocation.cpp | 1185 PhysReg get_reg(ra_ctx& ctx, in get_reg() function
1272 return get_reg(ctx, reg_file, temp, parallelcopies, instr, operand_index); in get_reg()
1275 return get_reg(ctx, reg_file, temp, parallelcopies, instr, operand_index); in get_reg()
1385 return get_reg(ctx, reg_file, temp, parallelcopies, instr); in get_reg_create_vector()
1555 PhysReg reg = get_reg(ctx, register_file, pc_op.getTemp(), parallelcopy, ctx.pseudo_dummy); in get_reg_for_operand()
1563 dst = get_reg(ctx, register_file, operand.getTemp(), parallelcopy, instr, operand_index); in get_reg_for_operand()
1929 … definition.setFixed(get_reg(ctx, register_file, definition.getTemp(), parallelcopy, phi)); in register_allocation()
2222 PhysReg reg = get_reg(ctx, register_file, tmp, parallelcopy, instr); in register_allocation()
2229 definition->setFixed(get_reg(ctx, register_file, tmp, parallelcopy, instr)); in register_allocation()
2361 PhysReg reg = get_reg(ctx, register_file, tmp, parallelcopy, instr); in register_allocation()
|
| /external/python/pycparser/utils/benchmark/inputs/ |
| D | tccgen.c.ppout | 3053 static int get_reg(int rc);
4209 static int get_reg(int rc)
4484 r = get_reg(rc);
4521 r2 = get_reg(rc2);
4636 r1 = get_reg(rc);
5923 t = get_reg(0x0001);
|
| /external/mesa3d/docs/relnotes/ |
| D | 20.1.0.rst | 1253 - aco: refactor get_reg() to take Temp instead of RegClass
1254 - aco: refactor get_reg() to also handle affinities
|
| /external/libabigail/tests/data/test-diff-dwarf-abixml/ |
| D | PR25409-librte_bus_dpaa.so.20.0.abi | 4230 …<var-decl name='get_reg' type-id='type-id-567' visibility='default' filepath='../../dpdk/lib/librt…
|