/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenFastISel.inc | 295 if ((Subtarget->hasNEON())) { 305 if ((Subtarget->hasNEON())) { 312 if ((Subtarget->hasNEON())) { 322 if ((Subtarget->hasNEON())) { 329 if ((!Subtarget->hasSlowVDUP32()) && (Subtarget->hasNEON())) { 339 if ((Subtarget->hasNEON())) { 423 if ((Subtarget->hasNEON())) { 435 if ((Subtarget->hasNEON())) { 454 if ((Subtarget->hasNEON())) { 466 if ((Subtarget->hasNEON())) { [all …]
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D | ARMGenDAGISel.inc | 1220 /* 2584*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1228 /* 2605*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1242 /* 2634*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1250 /* 2655*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1275 /* 2702*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1303 /* 2755*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1327 /* 2801*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1355 /* 2854*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1378 /* 2899*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1406 /* 2952*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) [all …]
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenFastISel.inc | 139 if ((Subtarget->hasNEON())) { 148 if ((Subtarget->hasNEON())) { 157 if ((Subtarget->hasNEON())) { 166 if ((Subtarget->hasNEON())) { 175 if ((Subtarget->hasNEON())) { 184 if ((Subtarget->hasNEON())) { 193 if ((Subtarget->hasNEON())) { 202 if ((Subtarget->hasNEON())) { 227 if ((Subtarget->hasNEON())) { 236 if ((Subtarget->hasNEON())) { [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMTargetTransformInfo.h | 82 if (ST->hasNEON()) in getNumberOfRegisters() 94 if (ST->hasNEON()) in getRegisterBitWidth()
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D | ARMTargetTransformInfo.cpp | 88 if (Src->isVectorTy() && ST->hasNEON() && (ISD == ISD::FP_ROUND || in getCastInstrCost() 179 if (SrcTy.isVector() && ST->hasNEON()) { in getCastInstrCost() 209 if (SrcTy.isFloatingPoint() && ST->hasNEON()) { in getCastInstrCost() 240 if (SrcTy.isInteger() && ST->hasNEON()) { in getCastInstrCost() 298 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) { in getCmpSelInstrCost() 462 if (ST->hasNEON()) in getArithmeticInstrCost()
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D | ARMSubtarget.h | 428 bool hasNEON() const { return HasNEON; } in hasNEON() function 434 return hasNEON() && UseNEONForSinglePrecisionFP; in useNEONForSinglePrecisionFP()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64TargetTransformInfo.h | 82 if (ST->hasNEON()) in getNumberOfRegisters() 91 if (ST->hasNEON()) in getRegisterBitWidth()
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D | AArch64InstrInfo.cpp | 1874 assert(Subtarget.hasNEON() && in copyPhysRegTuple() 2035 if(Subtarget.hasNEON()) { in copyPhysReg() 2056 if(Subtarget.hasNEON()) { in copyPhysReg() 2073 if(Subtarget.hasNEON()) { in copyPhysReg() 2090 if(Subtarget.hasNEON()) { in copyPhysReg() 2111 if(Subtarget.hasNEON()) { in copyPhysReg() 2226 assert(Subtarget.hasNEON() && in storeRegToStackSlot() 2234 assert(Subtarget.hasNEON() && in storeRegToStackSlot() 2242 assert(Subtarget.hasNEON() && in storeRegToStackSlot() 2247 assert(Subtarget.hasNEON() && in storeRegToStackSlot() [all …]
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D | AArch64Subtarget.h | 176 bool hasNEON() const { return HasNEON; } in hasNEON() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64TargetTransformInfo.h | 92 if (ST->hasNEON()) in getNumberOfRegisters() 101 if (ST->hasNEON()) in getRegisterBitWidth()
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D | AArch64InstrInfo.cpp | 2455 assert(Subtarget.hasNEON() && "Unexpected register copy without NEON"); in copyPhysRegTuple() 2679 if (Subtarget.hasNEON()) { in copyPhysReg() 2700 if (Subtarget.hasNEON()) { in copyPhysReg() 2717 if (Subtarget.hasNEON()) { in copyPhysReg() 2734 if (Subtarget.hasNEON()) { in copyPhysReg() 2755 if (Subtarget.hasNEON()) { in copyPhysReg() 2896 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 2908 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 2915 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 2919 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() [all …]
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D | AArch64Subtarget.h | 311 bool hasNEON() const { return HasNEON; } in hasNEON() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMTargetTransformInfo.cpp | 166 if (Src->isVectorTy() && ST->hasNEON() && (ISD == ISD::FP_ROUND || in getCastInstrCost() 293 if (SrcTy.isVector() && ST->hasNEON()) { in getCastInstrCost() 323 if (SrcTy.isFloatingPoint() && ST->hasNEON()) { in getCastInstrCost() 354 if (SrcTy.isInteger() && ST->hasNEON()) { in getCastInstrCost() 419 if (ST->hasNEON() && (Opcode == Instruction::InsertElement || in getVectorInstrCost() 451 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) { in getCmpSelInstrCost() 487 if (ST->hasNEON()) { in getAddressComputationCost() 577 if (ST->hasNEON()) { in getShuffleCost() 679 if (ST->hasNEON()) { in getArithmeticInstrCost() 798 if (ST->hasNEON() && Src->isVectorTy() && in getMemoryOpCost()
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D | ARMTargetTransformInfo.h | 128 if (ST->hasNEON()) in getNumberOfRegisters() 142 if (ST->hasNEON()) in getRegisterBitWidth()
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D | ARMSubtarget.h | 612 bool hasNEON() const { return HasNEON; } in hasNEON() function 623 return hasNEON() && UseNEONForSinglePrecisionFP; in useNEONForSinglePrecisionFP()
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D | ARMISelLowering.cpp | 756 if (Subtarget->hasNEON()) { in ARMTargetLowering() 776 if (Subtarget->hasMVEIntegerOps() || Subtarget->hasNEON()) { in ARMTargetLowering() 814 if (Subtarget->hasNEON()) { in ARMTargetLowering() 937 if (Subtarget->hasNEON() || Subtarget->hasMVEIntegerOps()) { in ARMTargetLowering() 1384 if (Subtarget->hasNEON()) { in ARMTargetLowering() 1421 if (Subtarget->hasNEON()) { in ARMTargetLowering() 1733 if (Subtarget->hasNEON() || Subtarget->hasMVEIntegerOps()) { in getRegClassFor() 5509 bool UseNEON = !InGPR && Subtarget->hasNEON(); in LowerFCOPYSIGN() 5949 if (VT.isVector() && ST->hasNEON()) { in LowerCTTZ() 6006 assert(ST->hasNEON() && "Custom ctpop lowering requires NEON."); in LowerCTPOP() [all …]
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D | ARMBaseInstrInfo.cpp | 858 Opc = Subtarget.hasNEON() ? ARM::VORRq : ARM::MVE_VORR; in copyPhysReg() 879 Opc = Subtarget.hasNEON() ? ARM::VORRq : ARM::MVE_VORR; in copyPhysReg() 883 Opc = Subtarget.hasNEON() ? ARM::VORRq : ARM::MVE_VORR; in copyPhysReg() 1103 if (ARM::DPairRegClass.hasSubClassEq(RC) && Subtarget.hasNEON()) { in storeRegToStackSlot() 1134 Subtarget.hasNEON()) { in storeRegToStackSlot() 1157 Subtarget.hasNEON()) { in storeRegToStackSlot() 1345 if (ARM::DPairRegClass.hasSubClassEq(RC) && Subtarget.hasNEON()) { in loadRegFromStackSlot() 1371 Subtarget.hasNEON()) { in loadRegFromStackSlot() 1394 Subtarget.hasNEON()) { in loadRegFromStackSlot() 4836 if (Subtarget.hasNEON()) { in getExecutionDomain() [all …]
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D | ARMPredicates.td | 84 def HasNEON : Predicate<"Subtarget->hasNEON()">,
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64TargetTransformInfo.h | 93 if (ST->hasNEON()) in getNumberOfRegisters() 107 if (ST->hasNEON()) in getRegisterBitWidth()
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D | AArch64InstrInfo.cpp | 2720 assert(Subtarget.hasNEON() && "Unexpected register copy without NEON"); in copyPhysRegTuple() 2973 if (Subtarget.hasNEON()) { in copyPhysReg() 2994 if (Subtarget.hasNEON()) { in copyPhysReg() 3011 if (Subtarget.hasNEON()) { in copyPhysReg() 3028 if (Subtarget.hasNEON()) { in copyPhysReg() 3049 if (Subtarget.hasNEON()) { in copyPhysReg() 3196 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 3212 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 3219 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 3223 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() [all …]
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D | AArch64Subtarget.h | 342 bool hasNEON() const { return HasNEON; } in hasNEON() function
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMTargetTransformInfo.cpp | 382 (ST->hasNEON() || ST->hasMVEIntegerOps())) { in getCFInstrCost() 518 I && I->hasOneUse() && ST->hasNEON() && SrcTy.isVector()) { in getCastInstrCost() 544 if (Src->isVectorTy() && ST->hasNEON() && in getCastInstrCost() 646 if (SrcTy.isVector() && ST->hasNEON()) { in getCastInstrCost() 676 if (SrcTy.isFloatingPoint() && ST->hasNEON()) { in getCastInstrCost() 707 if (SrcTy.isInteger() && ST->hasNEON()) { in getCastInstrCost() 788 if (ST->hasNEON() && (Opcode == Instruction::InsertElement || in getVectorInstrCost() 847 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT && CondTy) { in getCmpSelInstrCost() 888 if (ST->hasNEON()) { in getAddressComputationCost() 1039 if (ST->hasNEON()) { in getShuffleCost() [all …]
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D | ARMTargetTransformInfo.h | 140 if (ST->hasNEON()) in getNumberOfRegisters() 154 if (ST->hasNEON()) in getRegisterBitWidth()
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D | ARMSubtarget.h | 630 bool hasNEON() const { return HasNEON; } in hasNEON() function 641 return hasNEON() && UseNEONForSinglePrecisionFP; in useNEONForSinglePrecisionFP()
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D | ARMISelLowering.cpp | 789 if (Subtarget->hasNEON()) { in ARMTargetLowering() 814 if (Subtarget->hasMVEIntegerOps() || Subtarget->hasNEON()) { in ARMTargetLowering() 852 if (Subtarget->hasNEON()) { in ARMTargetLowering() 972 if (Subtarget->hasNEON() || Subtarget->hasMVEIntegerOps()) { in ARMTargetLowering() 1437 if (Subtarget->hasNEON()) { in ARMTargetLowering() 1474 if (Subtarget->hasNEON()) { in ARMTargetLowering() 1832 if (Subtarget->hasNEON() || Subtarget->hasMVEIntegerOps()) { in getRegClassFor() 5756 bool UseNEON = !InGPR && Subtarget->hasNEON(); in LowerFCOPYSIGN() 6142 if (VT.isVector() && ST->hasNEON()) { in LowerCTTZ() 6199 assert(ST->hasNEON() && "Custom ctpop lowering requires NEON."); in LowerCTPOP() [all …]
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