Searched refs:icc_sre_el3 (Results 1 – 8 of 8) sorted by relevance
| /external/capstone/suite/MC/AArch64/ |
| D | gicv3-regs.s.cs | 17 0xa8,0xcc,0x3e,0xd5 = mrs x8, icc_sre_el3
71 0xaa,0xcc,0x1e,0xd5 = msr icc_sre_el3, x10
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| /external/llvm/test/MC/AArch64/ |
| D | gicv3-regs.s | 18 mrs x8, icc_sre_el3
129 msr icc_sre_el3, x10
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| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | gicv3-regs.s | 18 mrs x8, icc_sre_el3
125 msr icc_sre_el3, x10
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| /external/arm-trusted-firmware/drivers/arm/gic/v3/ |
| D | gicv3_main.c | 280 unsigned int icc_sre_el3; in gicv3_cpuif_enable() local
292 icc_sre_el3 = ICC_SRE_DIB_BIT | ICC_SRE_DFB_BIT; in gicv3_cpuif_enable()
299 icc_sre_el3 |= (ICC_SRE_EN_BIT | ICC_SRE_SRE_BIT); in gicv3_cpuif_enable()
300 write_icc_sre_el3(read_icc_sre_el3() | icc_sre_el3); in gicv3_cpuif_enable()
311 write_icc_sre_el2(read_icc_sre_el2() | icc_sre_el3); in gicv3_cpuif_enable()
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| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 35 # CHECK: mrs x8, {{icc_sre_el3|ICC_SRE_EL3}}
139 # CHECK: msr {{icc_sre_el3|ICC_SRE_EL3}}, x10
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 35 # CHECK: mrs x8, {{icc_sre_el3|ICC_SRE_EL3}}
143 # CHECK: msr {{icc_sre_el3|ICC_SRE_EL3}}, x10
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| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | arch_helpers.h | 270 DEFINE_COPROCR_RW_FUNCS(icc_sre_el3, ICC_MSRE) in DEFINE_SYSREG_RW_FUNCS()
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| /external/arm-trusted-firmware/include/arch/aarch64/ |
| D | arch_helpers.h | 471 DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el3, ICC_SRE_EL3) in DEFINE_SYSREG_READ_FUNC()
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