| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 147 bool DstIsDead = MI.getOperand(0).isDead(); in expandArith()
150 bool ImpIsDead = MI.getOperand(3).isDead(); in expandArith()
180 bool DstIsDead = MI.getOperand(0).isDead(); in expandLogic()
183 bool ImpIsDead = MI.getOperand(3).isDead(); in expandLogic()
226 bool DstIsDead = MI.getOperand(0).isDead(); in expandLogicImm()
228 bool ImpIsDead = MI.getOperand(3).isDead(); in expandLogicImm()
278 bool DstIsDead = MI.getOperand(0).isDead(); in expand()
280 bool ImpIsDead = MI.getOperand(3).isDead(); in expand()
330 bool DstIsDead = MI.getOperand(0).isDead(); in expand()
332 bool ImpIsDead = MI.getOperand(3).isDead(); in expand()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | DeadMachineInstructionElim.cpp | 50 bool isDead(const MachineInstr *MI) const;
59 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { in isDead() function in DeadMachineInstructionElim
85 if (MO.isDead()) { in isDead()
138 if (isDead(MI)) { in runOnMachineFunction()
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| D | MachineInstrBundle.cpp | 187 if (MO.isDead()) { in finalizeBundle()
193 if (!MO.isDead()) in finalizeBundle()
198 if (!MO.isDead() && Register::isPhysicalRegister(Reg)) { in finalizeBundle()
215 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); in finalizeBundle() local
216 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
348 if (!MO.isDead()) in AnalyzePhysRegInBundle()
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| D | LiveRangeShrink.cpp | 146 else if (MO.isDead() && UseMap.count(MO.getReg())) in runOnMachineFunction()
174 if (!MO.isReg() || MO.isDead() || MO.isDebug()) in runOnMachineFunction()
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| D | PHIElimination.cpp | 252 bool isDead = MPhi->getOperand(0).isDead(); in LowerPHINode() local
320 if (isDead) { in LowerPHINode()
347 if (DestLI.endIndex().isDead()) { in LowerPHINode()
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| D | MachineCSE.cpp | 316 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg, I, MBB->end())) in hasLivePhysRegDefUses()
604 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead()) in ProcessBlockCSE()
609 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlockCSE()
660 if (!MI->getOperand(PhysDef.first).isDead()) in ProcessBlockCSE()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 147 bool DstIsDead = MI.getOperand(0).isDead(); in expandArith()
150 bool ImpIsDead = MI.getOperand(3).isDead(); in expandArith()
180 bool DstIsDead = MI.getOperand(0).isDead(); in expandLogic()
183 bool ImpIsDead = MI.getOperand(3).isDead(); in expandLogic()
226 bool DstIsDead = MI.getOperand(0).isDead(); in expandLogicImm()
228 bool ImpIsDead = MI.getOperand(3).isDead(); in expandLogicImm()
278 bool DstIsDead = MI.getOperand(0).isDead(); in expand()
280 bool ImpIsDead = MI.getOperand(3).isDead(); in expand()
330 bool DstIsDead = MI.getOperand(0).isDead(); in expand()
332 bool ImpIsDead = MI.getOperand(3).isDead(); in expand()
[all …]
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | DeadMachineInstructionElim.cpp | 51 bool isDead(const MachineInstr *MI) const;
62 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { in isDead() function in DeadMachineInstructionElim
88 if (MO.isDead()) { in isDead()
149 if (isDead(MI)) { in eliminateDeadMI()
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| D | MachineInstrBundle.cpp | 187 if (MO.isDead()) { in finalizeBundle()
193 if (!MO.isDead()) in finalizeBundle()
198 if (!MO.isDead() && Register::isPhysicalRegister(Reg)) { in finalizeBundle()
215 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); in finalizeBundle() local
216 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
347 if (!MO.isDead()) in AnalyzePhysRegInBundle()
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| D | LiveRangeShrink.cpp | 146 else if (MO.isDead() && UseMap.count(MO.getReg())) in runOnMachineFunction()
174 if (!MO.isReg() || MO.isDead() || MO.isDebug()) in runOnMachineFunction()
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| D | MachineCSE.cpp | 316 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg.asMCReg(), I, MBB->end())) in hasLivePhysRegDefUses()
604 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead()) in ProcessBlockCSE()
609 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlockCSE()
660 if (!MI->getOperand(PhysDef.first).isDead()) in ProcessBlockCSE()
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| D | PHIElimination.cpp | 282 bool isDead = MPhi->getOperand(0).isDead(); in LowerPHINode() local
372 if (isDead) { in LowerPHINode()
399 if (DestLI.endIndex().isDead()) { in LowerPHINode()
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| /external/llvm/lib/CodeGen/ |
| D | MachineInstrBundle.cpp | 175 if (MO.isDead()) { in finalizeBundle()
181 if (!MO.isDead()) in finalizeBundle()
186 if (!MO.isDead()) { in finalizeBundle()
203 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); in finalizeBundle() local
204 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
331 if (!MO.isDead()) in analyzePhysReg()
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| D | DeadMachineInstructionElim.cpp | 51 bool isDead(const MachineInstr *MI) const;
60 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { in isDead() function in DeadMachineInstructionElim
128 if (isDead(MI)) { in runOnMachineFunction()
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| D | PHIElimination.cpp | 235 bool isDead = MPhi->getOperand(0).isDead(); in LowerPHINode() local
303 if (isDead) { in LowerPHINode()
331 if (DestLI.endIndex().isDead()) { in LowerPHINode()
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| D | MachineCSE.cpp | 253 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg, I, MBB->end())) in hasLivePhysRegDefUses()
544 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead()) in ProcessBlock()
549 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlock()
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| D | MachineInstr.cpp | 178 bool isKill, bool isDead, bool isUndef, in ChangeToRegister() argument
198 IsDead = isDead; in ChangeToRegister()
319 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || in print()
345 if (isDead()) { in print()
1015 if (Check == CheckKillDead && MO.isDead() != OMO.isDead()) in isIdenticalTo()
1340 MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, bool Overlap, in findRegisterDefOperandIdx() argument
1360 if (Found && (!isDead || MO.isDead())) in findRegisterDefOperandIdx()
1645 if (!MO.isDead()) in allDefsAreDead()
2038 } else if (hasAliases && MO.isDead() && in addRegisterDead()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 292 bool isDead() const { in isDead() function
581 bool isKill = false, bool isDead = false,
607 bool isKill = false, bool isDead = false,
613 assert(!(isDead && !isDef) && "Dead flag on non-def");
619 Op.IsDead = isDead;
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 383 bool isDead() const { in isDead() function
754 bool isKill = false, bool isDead = false,
780 bool isKill = false, bool isDead = false,
786 assert(!(isDead && !isDef) && "Dead flag on non-def");
791 Op.IsDeadOrKill = isKill | isDead;
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 383 bool isDead() const { in isDead() function
759 bool isKill = false, bool isDead = false,
790 bool isKill = false, bool isDead = false,
796 assert(!(isDead && !isDef) && "Dead flag on non-def");
801 Op.IsDeadOrKill = isKill | isDead;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 405 bool DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandVLD()
539 DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandLaneOp()
671 bool DstIsDead = MI.getOperand(0).isDead(); in ExpandMOV32BitImm()
818 .addReg(Dest.getReg(), getKillRegState(Dest.isDead())) in ExpandCMP_SWAP()
875 MIB.addReg(RegLo, Flags | getKillRegState(Reg.isDead())); in addExclusiveRegPair()
876 MIB.addReg(RegHi, Flags | getKillRegState(Reg.isDead())); in addExclusiveRegPair()
878 MIB.addReg(Reg.getReg(), Flags | getKillRegState(Reg.isDead())); in addExclusiveRegPair()
932 .addReg(DestLo, getKillRegState(Dest.isDead())) in ExpandCMP_SWAP_64()
933 .addReg(DesiredLo, getKillRegState(Desired.isDead()))); in ExpandCMP_SWAP_64()
938 .addReg(DestHi, getKillRegState(Dest.isDead())) in ExpandCMP_SWAP_64()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 146 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm()
157 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm()
182 bool StatusDead = MI.getOperand(1).isDead(); in expandCMP_SWAP()
210 .addReg(Dest.getReg(), getKillRegState(Dest.isDead())) in expandCMP_SWAP()
262 bool StatusDead = MI.getOperand(2).isDead(); in expandCMP_SWAP_128()
291 .addReg(DestLo.getReg(), getKillRegState(DestLo.isDead())) in expandCMP_SWAP_128()
299 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
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| /external/tensorflow/tensorflow/tools/android/test/src/org/tensorflow/demo/tracking/ |
| D | ObjectTracker.java | 497 private boolean isDead; field in ObjectTracker.TrackedObject
500 isDead = false; in TrackedObject()
517 isDead = true; in stopTracking()
593 if (isDead) { in checkValidObject()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 128 const bool DstIsDead = MI.getOperand(0).isDead(); in tryOrrMovk()
193 const bool DstIsDead = MI.getOperand(0).isDead(); in tryToreplicateChunks()
376 const bool DstIsDead = MI.getOperand(0).isDead(); in trySequenceOfOnes()
552 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm()
635 .addReg(Dest.getReg(), getKillRegState(Dest.isDead())) in expandCMP_SWAP()
718 .addReg(DestLo.getReg(), getKillRegState(DestLo.isDead())) in expandCMP_SWAP_128()
722 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 151 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm()
162 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm()
187 bool StatusDead = MI.getOperand(1).isDead(); in expandCMP_SWAP()
215 .addReg(Dest.getReg(), getKillRegState(Dest.isDead())) in expandCMP_SWAP()
267 bool StatusDead = MI.getOperand(2).isDead(); in expandCMP_SWAP_128()
296 .addReg(DestLo.getReg(), getKillRegState(DestLo.isDead())) in expandCMP_SWAP_128()
304 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
400 bool DstIsDead = MI.getOperand(0).isDead(); in expand_DestructiveOp()
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