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Searched refs:isSignedIntSetCC (Results 1 – 24 of 24) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h883 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC() function
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h1080 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC() function
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h1296 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC() function
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1265 assert(ISD::isSignedIntSetCC(CC) || ISD::isUnsignedIntSetCC(CC)); in LowerSETCC()
1266 unsigned ExtOpc = ISD::isSignedIntSetCC(CC) ? ISD::SIGN_EXTEND in LowerSETCC()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1513 !ISD::isSignedIntSetCC(Cond) && in SimplifySetCC()
1739 if (ISD::isSignedIntSetCC(Cond)) { in SimplifySetCC()
DLegalizeDAG.cpp4157 ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteNode()
4170 ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteNode()
DDAGCombiner.cpp5854 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC)) in ExtendUsesToFormExtLoad()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp4424 ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteNode()
4437 ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteNode()
DTargetLowering.cpp3308 !ISD::isSignedIntSetCC(Cond) && in SimplifySetCC()
3562 if (ISD::isSignedIntSetCC(Cond)) { in SimplifySetCC()
DDAGCombiner.cpp8936 bool IsSigned = isSignedIntSetCC(CC); in visitVSELECT()
9179 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC)) in ExtendUsesToFormExtLoad()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp4634 ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteNode()
4662 ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteNode()
DTargetLowering.cpp3612 !ISD::isSignedIntSetCC(Cond) && in SimplifySetCC()
3867 if (ISD::isSignedIntSetCC(Cond)) { in SimplifySetCC()
DDAGCombiner.cpp9726 bool IsSigned = isSignedIntSetCC(CC); in visitVSELECT()
10076 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC)) in ExtendUsesToFormExtLoad()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp4080 const bool IsSigned = ISD::isSignedIntSetCC(CC); in PerformSELECTCombine()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp5093 if (ISD::isSignedIntSetCC(CC)) in Select()
DPPCISelLowering.cpp12363 if (ISD::isSignedIntSetCC(CC)) { in DAGCombineTruncBoolExt()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp5247 if (ISD::isSignedIntSetCC(CC)) in Select()
DPPCISelLowering.cpp13170 if (ISD::isSignedIntSetCC(CC)) { in DAGCombineTruncBoolExt()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp9772 if (ISD::isSignedIntSetCC(CC)) { in DAGCombineTruncBoolExt()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp4286 !isSignedIntSetCC(CC)) { in getARMCmp()
/external/llvm-project/llvm/lib/Target/ARM/
DARMISelLowering.cpp4564 !isSignedIntSetCC(CC)) { in getARMCmp()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp30312 (CC == ISD::SETNE || CC == ISD::SETEQ || ISD::isSignedIntSetCC(CC))) { in combineSetCC()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp43889 (CC == ISD::SETNE || CC == ISD::SETEQ || ISD::isSignedIntSetCC(CC))) { in combineSetCC()
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.cpp47300 (CC == ISD::SETNE || CC == ISD::SETEQ || ISD::isSignedIntSetCC(CC))) { in combineSetCC()