/external/llvm-project/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrControl.td | 106 let IsCanonical = 1, isTrap = 1 in 117 let isTrap = 1 in
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/external/llvm-project/llvm/utils/TableGen/ |
D | InstrDocsEmitter.cpp | 112 FLAG(isTrap) in EmitInstrDocs()
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D | CodeGenInstruction.h | 249 bool isTrap : 1; variable
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D | InstrInfoEmitter.cpp | 755 if (Inst.isTrap) OS << "|(1ULL<<MCID::Trap)"; in emitRecord()
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D | CodeGenInstruction.cpp | 386 isTrap = R->getValueAsBit("isTrap"); in CodeGenInstruction()
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/external/llvm-project/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 265 bool isTrap() const { return Flags & (1ULL << MCID::Trap); } in isTrap() function
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 280 bool isTrap() const { return Flags & (1ULL << MCID::Trap); } in isTrap() function
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/external/llvm-project/llvm/tools/llvm-cfi-verify/lib/ |
D | FileAnalysis.cpp | 171 return InstrDesc.isTrap() || willTrapOnCFIViolation(InstrMeta); in isCFITrap()
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/external/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 967 bool isTrap = false; in emitPopInst() local 974 isTrap = in emitPopInst() 993 !isTrap && STI.hasV5TOps()) { in emitPopInst()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 1062 bool isTrap = false; in emitPopInst() local 1069 isTrap = in emitPopInst() 1089 !isTrap && STI.hasV5TOps()) { in emitPopInst()
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 1065 bool isTrap = false; in emitPopInst() local 1073 isTrap = in emitPopInst() 1094 !isCmseEntry && !isTrap && STI.hasV5TOps()) { in emitPopInst()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrSystem.td | 24 let mayLoad = 1, mayStore = 0, hasSideEffects = 1, isTrap = 1 in {
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86InstrSystem.td | 24 let mayLoad = 1, mayStore = 0, hasSideEffects = 1, isTrap = 1 in {
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 1132 let isTrap = 1;
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 1256 let isTrap = 1;
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | Target.td | 513 bit isTrap = 0; // Is this instruction a trap instruction?
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/external/llvm-project/llvm/include/llvm/Target/ |
D | Target.td | 525 bit isTrap = false; // Is this instruction a trap instruction?
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/external/llvm-project/llvm/docs/TableGen/ |
D | ProgRef.rst | 1827 bit isTrap = 0;
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/external/llvm-project/llvm/lib/Target/VE/ |
D | VEInstrInfo.td | 1507 let cx = 1, isTrap = 1 in def MONCHDB : RR<0x3F, (outs), (ins), "monc.hdb">;
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/external/llvm-project/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.td | 1877 let isTrap = 1;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 4276 let hasSideEffects = 1, isTrap = 1, mayLoad = 0, mayStore = 0 in {
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D | AArch64InstrInfo.td | 1976 let isTrap = 1 in {
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2149 let isTrap = 1 in {
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D | AArch64InstrFormats.td | 4412 let hasSideEffects = 1, isTrap = 1, mayLoad = 0, mayStore = 0 in {
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