/external/mesa3d/src/amd/compiler/ |
D | aco_scheduler.cpp | 557 if (candidate->isVMEM()) in schedule_SMEM() 606 if (is_dependency && candidate->isVMEM()) in schedule_SMEM() 639 if (res == move_fail_ssa && candidate->isVMEM()) in schedule_SMEM() 677 bool is_vmem = candidate->isVMEM() || candidate->isFlatOrGlobal(); in schedule_VMEM() 689 if (current->isVMEM() == candidate->isVMEM()) { in schedule_VMEM() 691 if (current->isVMEM()) in schedule_VMEM() 743 bool is_vmem = candidate->isVMEM() || candidate->isFlatOrGlobal(); in schedule_VMEM() 815 if (candidate->isVMEM() || candidate->format == Format::SMEM || candidate->isFlatOrGlobal()) in schedule_position_export() 854 if (current->isVMEM() || current->isFlatOrGlobal()) { in schedule_block()
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D | aco_statistics.cpp | 55 if (instr->isVMEM() && !instr->operands.empty()) { in collect_preasm_stats()
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D | aco_form_hard_clauses.cpp | 78 if (instr->isVMEM() && !instr->operands.empty()) { in form_hard_clauses()
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D | aco_insert_NOPs.cpp | 397 } else if (instr->isVMEM() || instr->isFlatOrGlobal() || instr->format == Format::SCRATCH) { in handle_instruction_gfx6() 492 } else if (instr->isVMEM() || instr->isFlatOrGlobal() || instr->format == Format::SCRATCH) { in handle_instruction_gfx6() 597 if (instr->isVMEM() || instr->format == Format::FLAT || instr->format == Format::GLOBAL || in handle_instruction_gfx10() 715 if (instr->isVMEM() || instr->format == Format::GLOBAL || instr->format == Format::SCRATCH) { in handle_instruction_gfx10()
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D | aco_insert_waitcnt.cpp | 419 if (instr->isVMEM() && ((it->second.events & vm_events) == event_vmem) && in check_instr()
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D | aco_ir.h | 935 constexpr bool isVMEM() const noexcept in isVMEM() function
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D | aco_register_allocation.cpp | 2053 (instr->isVMEM() && i == 3 && ctx.program->chip_class == GFX6) || in register_allocation()
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/external/llvm/lib/Target/AMDGPU/ |
D | GCNHazardRecognizer.cpp | 48 if (SIInstrInfo::isVMEM(*MI) && checkVMEMHazards(MI) > 0) in getHazardType() 65 if (SIInstrInfo::isVMEM(*MI)) in PreEmitNoops()
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D | SIInstrInfo.h | 199 static bool isVMEM(const MachineInstr &MI) { in isVMEM() function 203 bool isVMEM(uint16_t Opcode) const { in isVMEM() function
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | GCNHazardRecognizer.cpp | 156 if ((SIInstrInfo::isVMEM(*MI) || in getHazardType() 203 if ((SIInstrInfo::isVMEM(*MI) || in getHazardType() 268 if (SIInstrInfo::isVMEM(*MI) || SIInstrInfo::isFLAT(*MI)) in PreEmitNoopsCommon() 313 if (SIInstrInfo::isVMEM(*MI) || in PreEmitNoopsCommon() 514 return !SIInstrInfo::isVMEM(*MI) && !SIInstrInfo::isFLAT(*MI); in breaksVMEMSoftClause() 918 if (!SIInstrInfo::isVMEM(*I) && !SIInstrInfo::isDS(*I) && in fixVMEMtoScalarWriteHazards() 1085 if (SIInstrInfo::isVMEM(*MI) || SIInstrInfo::isSegmentSpecificFLAT(*MI)) in fixLdsBranchVmemWARHazard() 1172 if (!SIInstrInfo::isVMEM(*I) && !SIInstrInfo::isFLAT(*I)) in checkFPAtomicToDenormModeHazard()
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D | SIRemoveShortExecBranches.cpp | 103 if (TII->isSMRD(*I) || TII->isVMEM(*I) || TII->isFLAT(*I) || in mustRetainExeczBranch()
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D | SIInsertHardClauses.cpp | 68 if (SIInstrInfo::isVMEM(MI) || SIInstrInfo::isSegmentSpecificFLAT(MI)) in getHardClauseType()
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D | SIInsertWaitcnts.cpp | 180 assert(SIInstrInfo::isVMEM(Inst)); in getVmemType() 662 if (SIInstrInfo::isVMEM(Inst)) { in updateByEvent() 1039 if (Op.isUse() || !SIInstrInfo::isVMEM(MI) || in generateWaitcntInstBefore() 1295 } else if (SIInstrInfo::isVMEM(Inst) && in updateEventWaitcntAfter()
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D | SIFormMemoryClauses.cpp | 101 return SIInstrInfo::isFLAT(MI) || SIInstrInfo::isVMEM(MI); in isVMEMClauseInst()
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D | SIInsertSkips.cpp | 146 if (TII->isSMRD(*I) || TII->isVMEM(*I) || TII->isFLAT(*I) || in shouldSkip()
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D | SIInstrInfo.h | 355 static bool isVMEM(const MachineInstr &MI) { in isVMEM() function 359 bool isVMEM(uint16_t Opcode) const { in isVMEM() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | GCNHazardRecognizer.cpp | 141 if ((SIInstrInfo::isVMEM(*MI) || in getHazardType() 254 if (SIInstrInfo::isVMEM(*MI) || SIInstrInfo::isFLAT(*MI)) in PreEmitNoopsCommon() 917 if (!SIInstrInfo::isVMEM(*I) && !SIInstrInfo::isDS(*I) && in fixVMEMtoScalarWriteHazards() 1081 if (SIInstrInfo::isVMEM(*MI) || SIInstrInfo::isSegmentSpecificFLAT(*MI)) in fixLdsBranchVmemWARHazard() 1168 if (!SIInstrInfo::isVMEM(*I) && !SIInstrInfo::isFLAT(*I)) in checkFPAtomicToDenormModeHazard()
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D | AMDGPUSubtarget.cpp | 780 if ((TII->isVMEM(MI1) && TII->isVMEM(MI2)) || in apply()
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D | SIFormMemoryClauses.cpp | 101 return SIInstrInfo::isFLAT(MI) || SIInstrInfo::isVMEM(MI); in isVMEMClauseInst()
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D | SIInstrInfo.h | 349 static bool isVMEM(const MachineInstr &MI) { in isVMEM() function 353 bool isVMEM(uint16_t Opcode) const { in isVMEM() function
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D | SIInsertSkips.cpp | 136 if (TII->isSMRD(*I) || TII->isVMEM(*I) || TII->isFLAT(*I) || in shouldSkip()
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D | SIInsertWaitcnts.cpp | 1248 } else if (SIInstrInfo::isVMEM(Inst) && in updateEventWaitcntAfter()
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