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Searched refs:ld1rqw (Results 1 – 12 of 12) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dld1rqw-diagnostics.s6 ld1rqw z0.s, p0/z, [x0, #-144] label
11 ld1rqw z0.s, p0/z, [x0, #-129] label
16 ld1rqw z0.s, p0/z, [x0, #113] label
21 ld1rqw z0.s, p0/z, [x0, #128] label
26 ld1rqw z0.s, p0/z, [x0, #12] label
35 ld1rqw z0.s, p0/z, [x0, #16, MUL VL] label
44 ld1rqw z0.b, p0/z, [x0, x1, lsl #2] label
49 ld1rqw z0.h, p0/z, [x0, x1, lsl #2] label
54 ld1rqw z0.d, p0/z, [x0, x1, lsl #2] label
63 ld1rqw z0.s, p0/z, [x0, xzr, lsl #2] label
[all …]
Dld1rqw.s10 ld1rqw { z0.s }, p0/z, [x0] label
16 ld1rqw { z0.s }, p0/z, [x0, x0, lsl #2] label
22 ld1rqw { z31.s }, p7/z, [sp, #-16] label
28 ld1rqw { z23.s }, p3/z, [x13, #-128] label
34 ld1rqw { z23.s }, p3/z, [x13, #112] label
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-loads.ll127 ; CHECK: ld1rqw { z0.s }, p0/z, [x0]
135 ; CHECK: ld1rqw { z0.s }, p0/z, [x0]
143 ; CHECK: ld1rqw { z0.s }, p0/z, [x0, #112]
152 ; CHECK: ld1rqw { z0.s }, p0/z, [x0, #32]
/external/vixl/src/aarch64/
Dmacro-assembler-sve-aarch64.cc1525 &MacroAssembler::ld1rqw, in Ld1rqw()
Dassembler-aarch64.h4578 void ld1rqw(const ZRegister& zt,
Dassembler-sve-aarch64.cc4785 void Assembler::ld1rqw(const ZRegister& zt, in ld1rqw() function in vixl::aarch64::Assembler
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td380 defm LD1RQ_W_IMM : sve_mem_ldqr_si<0b10, "ld1rqw", Z_s, ZPR32>;
384 defm LD1RQ_W : sve_mem_ldqr_ss<0b10, "ld1rqw", Z_s, ZPR32, GPR64NoXZRshifted32>;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12514 "\006ld1rqb\006ld1rqd\006ld1rqh\006ld1rqw\006ld1rsb\006ld1rsh\006ld1rsw\005"
15194 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg…
15195 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__…
15196 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5_…
15197 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg…
15198 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1…
15199 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__…
22567 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg…
22568 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__…
22569 …{ 1917 /* ld1rqw */, AArch64::LD1RQ_W, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5_…
[all …]
DAArch64GenAsmWriter.inc22310 /* 3575 */ "ld1rqw $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0"
DAArch64GenAsmWriter1.inc23031 /* 3567 */ "ld1rqw $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0"
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td720 defm LD1RQ_W_IMM : sve_mem_ldqr_si<0b10, "ld1rqw", Z_s, ZPR32>;
724 defm LD1RQ_W : sve_mem_ldqr_ss<0b10, "ld1rqw", Z_s, ZPR32, GPR64NoXZRshifted32>;
/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc4471 COMPARE_PREFIX(ld1rqw(z12.VnS(), in TEST()
4483 COMPARE_PREFIX(ld1rqw(z22.VnS(), p3.Zeroing(), SVEMemOperand(sp, -128)), in TEST()