| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.1a-lor.s | 8 ldlarb w0,[x1]
36 ldlarb w0,[w1]
|
| /external/llvm/test/MC/AArch64/ |
| D | armv8.1a-lor.s | 8 ldlarb w0,[x1]
36 ldlarb w0,[w1]
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-lor.txt | 11 # CHECK: ldlarb w0, [x1]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-lor.txt | 11 # CHECK: ldlarb w0, [x1]
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1655 COMPARE(ldlarb(w12, MemOperand(x13)), "ldlarb w12, [x13]"); in TEST()
1656 COMPARE(ldlarb(w14, MemOperand(sp)), "ldlarb w14, [sp]"); in TEST()
1657 COMPARE(ldlarb(x15, MemOperand(x16)), "ldlarb w15, [x16]"); in TEST()
1658 COMPARE(ldlarb(x17, MemOperand(sp)), "ldlarb w17, [sp]"); in TEST()
|
| D | test-cpu-features-aarch64.cc | 3521 TEST_LOREGIONS(ldlarb_0, ldlarb(w0, MemOperand(x1, 0)))
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1378 void ldlarb(const Register& rt, const MemOperand& src);
|
| D | assembler-aarch64.cc | 1620 void Assembler::ldlarb(const Register& rt, const MemOperand& src) { in ldlarb() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 1717 ldlarb(rt, src); in Ldlarb()
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1238 void ldlarb(const Register& rt, const MemOperand& src)
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2479 def LDLARB : LoadAcquire <0b00, 1, 1, 0, 0, GPR32, "ldlarb">;
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3494 def LDLARB : LoadAcquire <0b00, 1, 1, 0, 0, GPR32, "ldlarb">;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3288 def LDLARB : LoadAcquire <0b00, 1, 1, 0, 0, GPR32, "ldlarb">;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12526 "f1sw\006ldff1w\003ldg\004ldgm\005ldlar\006ldlarb\006ldlarh\006ldnf1b\006"
16049 …{ 2517 /* ldlarb */, AArch64::LDLARB, Convert__Reg1_0__GPR64sp01_2, AMFBS_HasLOR, { MCK_GPR32, MCK…
23422 …{ 2517 /* ldlarb */, AArch64::LDLARB, Convert__Reg1_0__GPR64sp01_2, AMFBS_HasLOR, { MCK_GPR32, MCK…
34139 { 2517 /* ldlarb */, 4 /* 2 */, MCK_GPR64sp0, AMFBS_HasLOR },
34140 { 2517 /* ldlarb */, 4 /* 2 */, MCK_GPR64sp0, AMFBS_HasLOR },
|