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Searched refs:lo16 (Results 1 – 25 of 38) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dfold_16bit_imm.mir11 ; GCN: [[COPY:%[0-9]+]]:sgpr_lo16 = COPY killed [[S_MOV_B32_]].lo16
14 %1:sgpr_lo16 = COPY killed %0.lo16
29 $sgpr0_lo16 = COPY killed %0.lo16
44 $agpr0_lo16 = COPY killed %0.lo16
56 ; GCN: [[COPY:%[0-9]+]]:vgpr_lo16 = COPY killed [[S_MOV_B32_]].lo16
59 %1:vgpr_lo16 = COPY killed %0.lo16
71 ; GCN: $vgpr0_lo16 = COPY killed [[S_MOV_B32_]].lo16
74 $vgpr0_lo16 = COPY killed %0.lo16
Dconstant-fold-imm-immreg.mir35 …%6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.hi16, killed %3, %subreg.lo16, killed %4, %subreg.su…
76 %14:vreg_64 = REG_SEQUENCE %3, %subreg.hi16, %13, %subreg.lo16
82 %19:vreg_64 = REG_SEQUENCE %20, %subreg.hi16, killed %17, %subreg.lo16
127 …%10:sgpr_128 = REG_SEQUENCE killed %7, %subreg.hi16, killed %6, %subreg.lo16, killed %9, %subreg.s…
154 …%8:sgpr_128 = REG_SEQUENCE killed %5, %subreg.hi16, killed %4, %subreg.lo16, killed %7, %subreg.su…
206 %16:vreg_64 = REG_SEQUENCE %2, %subreg.hi16, %15, %subreg.lo16
212 %20:vreg_64 = REG_SEQUENCE %21, %subreg.hi16, killed %18, %subreg.lo16
277 …%8:sgpr_128 = REG_SEQUENCE killed %5, %subreg.hi16, killed %4, %subreg.lo16, killed %7, %subreg.su…
330 %16:vreg_64 = REG_SEQUENCE %2, %subreg.hi16, %15, %subreg.lo16
336 %20:vreg_64 = REG_SEQUENCE %21, %subreg.hi16, killed %18, %subreg.lo16
/external/llvm-project/llvm/test/CodeGen/ARM/
Dconstant-island-movwt.mir401 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.18, 14, $noreg
406 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.71, 14, $noreg
409 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.73, 14, $noreg
412 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.75, 14, $noreg
415 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.19, 14, $noreg
419 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.61, 14, $noreg
422 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.63, 14, $noreg
425 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.122, 14, $noreg
427 $r12 = t2MOVi16 target-flags(arm-lo16) @.str.112, 14, $noreg
430 $r1 = t2MOVi16 target-flags(arm-lo16) @.str.114, 14, $noreg
[all …]
Dmachine-outliner-unoutlinable.mir127 $r0 = t2MOVi16_ga_pcrel target-flags(arm-lo16, arm-nonlazy) @z, 0
128 $r0 = t2MOVTi16_ga_pcrel $r0, target-flags(arm-lo16, arm-nonlazy) @z, 0
134 $r0 = t2MOVi16_ga_pcrel target-flags(arm-lo16, arm-nonlazy) @z, 0
135 $r0 = t2MOVTi16_ga_pcrel $r0, target-flags(arm-lo16, arm-nonlazy) @z, 0
Dvldmia-sched.mir23 $r0 = t2MOVi16 target-flags(arm-lo16) @a, 14, $noreg
/external/llvm-project/llvm/test/TableGen/
DGlobalISelEmitter-nested-subregs.td10 def lo16 : SubRegIndex<16>;
25 let SubRegIndices = [hi16, lo16];
40 …EG:{ *:[i32] } (IMPLICIT_DEF:{ *:[i32] }), A0b:{ *:[i8] }:$src, lo8:{ *:[i32] }), lo16:{ *:[i32] })
56 …CHECK-NEXT: GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, MyTarget::lo16,
66 lo16))>;
/external/llvm/test/CodeGen/PowerPC/
Dhidden-vis-2.ll5 ; CHECK: lwz r2, lo16(L_x$non_lazy_ptr)(r2)
6 ; CHECK: lwz r3, lo16(L_y$non_lazy_ptr)(r3)
Dindirectbr.ll62 ; PIC: li r[[R1:[0-9]+]], lo16(Ltmp0-L0$pb)
66 ; STATIC: li r[[R0:[0-9]+]], lo16(Ltmp0)
Dhello-reloc.s28 la r3, lo16(L_.str-L0$pb)(r2)
47 lwzu r12, lo16(L_puts$lazy_ptr-L_puts$stub$tmp)(r11)
/external/llvm-project/llvm/test/CodeGen/Mips/mirparser/
Dtarget-flags-pic-mxgot-tls.mir155 %9 = LD killed %8, target-flags(mips-call-lo16) @_Z1gi :: (load 8 from call-entry @_Z1gi)
165 %15 = LD killed %14, target-flags(mips-got-lo16) @v :: (load 8 from got)
171 …%19 = LD killed %18, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tl…
189 …%41 = LD killed %40, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tl…
205 …%26 = LD %25, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tls_get_a…
219 %34 = LD killed %32, target-flags(mips-call-lo16) @_Z1gi :: (load 8 from call-entry @_Z1gi)
226 …%36 = LD %25, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tls_get_a…
243 %46 = LD killed %45, target-flags(mips-got-lo16) @_ZTH1j :: (load 8 from got)
253 %49 = LD killed %48, target-flags(mips-call-lo16) @_ZTH1j :: (load 8 from call-entry @_ZTH1j)
262 …%52 = LD killed %51, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tl…
/external/llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/
Dout-of-range-cbz.mir179 ; CHECK: $r1 = t2MOVi16 target-flags(arm-lo16) @a, 14 /* CC::al */, $noreg
182 ; CHECK: $r1 = t2MOVi16 target-flags(arm-lo16) @d, 14 /* CC::al */, $noreg
186 ; CHECK: $r1 = t2MOVi16 target-flags(arm-lo16) @e, 14 /* CC::al */, $noreg
202 ; CHECK: $r12 = t2MOVi16 target-flags(arm-lo16) @d, 14 /* CC::al */, $noreg
203 ; CHECK: $lr = t2MOVi16 target-flags(arm-lo16) @a, 14 /* CC::al */, $noreg
205 ; CHECK: $r2 = t2MOVi16 target-flags(arm-lo16) @e, 14 /* CC::al */, $noreg
273 ; CHECK: $r0 = t2MOVi16 target-flags(arm-lo16) @d, 14 /* CC::al */, $noreg
274 ; CHECK: $r1 = t2MOVi16 target-flags(arm-lo16) @a, 14 /* CC::al */, $noreg
279 ; CHECK: $r1 = t2MOVi16 target-flags(arm-lo16) @e, 14 /* CC::al */, $noreg
316 $r1 = t2MOVi16 target-flags(arm-lo16) @a, 14, $noreg
[all …]
Dbegin-vpt-without-inst.mir69 ; CHECK: $r1 = t2MOVi16 target-flags(arm-lo16) @arr, 14 /* CC::al */, $noreg
97 $r1 = t2MOVi16 target-flags(arm-lo16) @arr, 14 /* CC::al */, $noreg
Dcmplx_cong.mir47 …; CHECK: $r4 = t2MOVi16 target-flags(arm-lo16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC…
76 …$r4 = t2MOVi16 target-flags(arm-lo16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $n…
/external/marisa-trie/lib/marisa/grimoire/vector/
Dpop-count.h25 std::size_t lo16() const { in lo16() function
78 std::size_t lo16() const {
Dbit-vector.cc629 if (i < count.lo16()) { in select0()
638 i -= count.lo16(); in select0()
720 if (i < count.lo16()) { in select1()
729 i -= count.lo16(); in select1()
/external/llvm-project/llvm/test/CodeGen/MIR/Hexagon/
Dtarget-flags.mir12 ; CHECK: target-flags(hexagon-lo16)
13 $r0 = A2_tfrsi target-flags (hexagon-lo16) 0
/external/marisa-trie/tests/
Dvector-test.cc22 ASSERT(count.lo16() == 0); in TestPopCount()
34 ASSERT(count.lo16() == 16); in TestPopCount()
46 ASSERT(count.lo16() == 3); in TestPopCount()
64 ASSERT(count.lo16() == 0);
72 ASSERT(count.lo16() == 16);
80 ASSERT(count.lo16() == 6);
/external/llvm-project/llvm/lib/Target/PowerPC/
DREADME.txt73 lfd f0, lo16(.CPI_X_0)(r2)
75 lfd f2, lo16(.CPI_X_1)(r2)
78 lfd f1, lo16(.CPI_X_2)(r2)
80 lfd f2, lo16(.CPI_X_3)(r2)
99 lfs f0, lo16(LCPI1_0)(r2)
102 lfs f2, lo16(LCPI1_2)(r3)
103 lfs f3, lo16(LCPI1_1)(r2)
133 la r2, lo16(_a)(r2)
142 lbz r2, lo16(_a+3)(r2)
305 lfs f0, lo16(.CPI_foo_0-"L00000$pb")(r2)
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DREADME.txt73 lfd f0, lo16(.CPI_X_0)(r2)
75 lfd f2, lo16(.CPI_X_1)(r2)
78 lfd f1, lo16(.CPI_X_2)(r2)
80 lfd f2, lo16(.CPI_X_3)(r2)
99 lfs f0, lo16(LCPI1_0)(r2)
102 lfs f2, lo16(LCPI1_2)(r3)
103 lfs f3, lo16(LCPI1_1)(r2)
194 la r2, lo16(_a)(r2)
203 lbz r2, lo16(_a+3)(r2)
366 lfs f0, lo16(.CPI_foo_0-"L00000$pb")(r2)
/external/llvm/lib/Target/PowerPC/
DREADME.txt73 lfd f0, lo16(.CPI_X_0)(r2)
75 lfd f2, lo16(.CPI_X_1)(r2)
78 lfd f1, lo16(.CPI_X_2)(r2)
80 lfd f2, lo16(.CPI_X_3)(r2)
99 lfs f0, lo16(LCPI1_0)(r2)
102 lfs f2, lo16(LCPI1_2)(r3)
103 lfs f3, lo16(LCPI1_1)(r2)
191 la r2, lo16(_a)(r2)
200 lbz r2, lo16(_a+3)(r2)
363 lfs f0, lo16(.CPI_foo_0-"L00000$pb")(r2)
/external/python/cpython2/Modules/_ctypes/libffi_osx/powerpc/
Dppc64-darwin_closure.S368 lgu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)(r11)
389 lgu r12,lo16(L_ffi64_struct_to_reg_form$lazy_ptr - LO$ffi64_struct_to_reg_form)(r11)
405 lgu r12,lo16(L_ffi64_data_size$lazy_ptr - LO$ffi64_data_size)(r11)
Dppc-darwin_closure.S298 lgu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)(r11)
/external/python/cpython3/Modules/_ctypes/libffi_osx/powerpc/
Dppc64-darwin_closure.S368 lgu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)(r11)
389 lgu r12,lo16(L_ffi64_struct_to_reg_form$lazy_ptr - LO$ffi64_struct_to_reg_form)(r11)
405 lgu r12,lo16(L_ffi64_data_size$lazy_ptr - LO$ffi64_data_size)(r11)
Dppc-darwin_closure.S298 lgu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)(r11)
/external/llvm-project/llvm/test/DebugInfo/ARM/
Dcfi-eof-prologue.mir168 $r0 = t2MOVi16_ga_pcrel target-flags(arm-lo16, arm-nonlazy) @_ZTV1B, 0, debug-location !36
209 $r0 = t2MOVi16_ga_pcrel target-flags(arm-lo16, arm-nonlazy) @_ZTV1B, 0, debug-location !46

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