Searched refs:lr_svc (Results 1 – 15 of 15) sorted by relevance
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 61 mrs r1, lr_svc
64 @ CHECK-ARM: mrs r1, lr_svc @ encoding: [0x00,0x13,0x02,0xe1]
67 @ CHECK-THUMB: mrs r1, lr_svc @ encoding: [0xe2,0xf3,0x30,0x81]
171 msr lr_svc, r1
174 @ CHECK-ARM: msr lr_svc, r1 @ encoding: [0x01,0xf3,0x22,0xe1]
177 @ CHECK-THUMB: msr lr_svc, r1 @ encoding: [0x81,0xf3,0x30,0x82]
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| /external/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 61 mrs r1, lr_svc
64 @ CHECK-ARM: mrs r1, lr_svc @ encoding: [0x00,0x13,0x02,0xe1]
67 @ CHECK-THUMB: mrs r1, lr_svc @ encoding: [0xe2,0xf3,0x30,0x81]
171 msr lr_svc, r1
174 @ CHECK-ARM: msr lr_svc, r1 @ encoding: [0x01,0xf3,0x22,0xe1]
177 @ CHECK-THUMB: msr lr_svc, r1 @ encoding: [0x81,0xf3,0x30,0x82]
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| /external/arm-trusted-firmware/include/common/ |
| D | ep_info.h | 46 __builtin_offsetof(entry_point_info_t, lr_svc),
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| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | smccc_macros.S | 75 mrs r5, lr_svc
217 msr lr_svc, r5
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| D | smccc_helpers.h | 63 u_register_t lr_svc; member
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| /external/arm-trusted-firmware/include/export/common/ |
| D | ep_info_exp.h | 100 uintptr_t lr_svc; member
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-thumb.txt | 45 @ CHECK: mrs r1, lr_svc
122 @ CHECK: msr lr_svc, r1
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| D | move-banked-regs-arm.txt | 46 @ CHECK: mrs r1, lr_svc
120 @ CHECK: msr lr_svc, r1
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-arm.txt | 46 @ CHECK: mrs r1, lr_svc
120 @ CHECK: msr lr_svc, r1
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| D | move-banked-regs-thumb.txt | 45 @ CHECK: mrs r1, lr_svc
122 @ CHECK: msr lr_svc, r1
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| /external/arm-trusted-firmware/plat/imx/imx7/common/ |
| D | imx7_bl2_el3_common.c | 102 pager_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc; in bl2_plat_handle_post_image_load()
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| /external/arm-trusted-firmware/plat/qemu/common/ |
| D | qemu_bl2_setup.c | 192 pager_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc; in qemu_bl2_handle_post_image_load()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenSystemRegister.inc | 8 lr_svc = 5,
104 { "lr_svc", 0x12 }, // 16
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMSystemRegister.td | 139 def : BankedReg<"lr_svc", 0x12>;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMSystemRegister.td | 139 def : BankedReg<"lr_svc", 0x12>;
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