Searched refs:lr_und (Results 1 – 11 of 11) sorted by relevance
/external/llvm-project/llvm/test/MC/ARM/ |
D | move-banked-regs.s | 81 mrs r9, lr_und 84 @ CHECK-ARM: mrs r9, lr_und @ encoding: [0x00,0x93,0x06,0xe1] 87 @ CHECK-THUMB: mrs r9, lr_und @ encoding: [0xe6,0xf3,0x30,0x89] 191 msr lr_und, r9 194 @ CHECK-ARM: msr lr_und, r9 @ encoding: [0x09,0xf3,0x26,0xe1] 197 @ CHECK-THUMB: msr lr_und, r9 @ encoding: [0x89,0xf3,0x30,0x86]
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/external/llvm/test/MC/ARM/ |
D | move-banked-regs.s | 81 mrs r9, lr_und 84 @ CHECK-ARM: mrs r9, lr_und @ encoding: [0x00,0x93,0x06,0xe1] 87 @ CHECK-THUMB: mrs r9, lr_und @ encoding: [0xe6,0xf3,0x30,0x89] 191 msr lr_und, r9 194 @ CHECK-ARM: msr lr_und, r9 @ encoding: [0x09,0xf3,0x26,0xe1] 197 @ CHECK-THUMB: msr lr_und, r9 @ encoding: [0x89,0xf3,0x30,0x86]
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/external/arm-trusted-firmware/include/arch/aarch32/ |
D | smccc_macros.S | 81 mrs r11, lr_und 223 msr lr_und, r11
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D | smccc_helpers.h | 69 u_register_t lr_und; member
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/external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
D | move-banked-regs-thumb.txt | 59 @ CHECK: mrs r9, lr_und 136 @ CHECK: msr lr_und, r9
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D | move-banked-regs-arm.txt | 60 @ CHECK: mrs r9, lr_und 134 @ CHECK: msr lr_und, r9
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/external/llvm/test/MC/Disassembler/ARM/ |
D | move-banked-regs-arm.txt | 60 @ CHECK: mrs r9, lr_und 134 @ CHECK: msr lr_und, r9
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D | move-banked-regs-thumb.txt | 59 @ CHECK: mrs r9, lr_und 136 @ CHECK: msr lr_und, r9
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenSystemRegister.inc | 9 lr_und = 6, 108 { "lr_und", 0x16 }, // 20
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMSystemRegister.td | 143 def : BankedReg<"lr_und", 0x16>;
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMSystemRegister.td | 143 def : BankedReg<"lr_und", 0x16>;
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