| /external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
| D | PatternMatchTest.cpp | 53 mi_match(MIBAdd.getReg(0), *MRI, m_GAdd(m_Reg(), m_Reg())); in TEST_F()
57 m_GAdd(m_Reg(Src0), m_Reg(Src1))); in TEST_F()
67 m_GMul(m_Reg(Src0), m_Reg(Src1))); in TEST_F()
74 m_GMul(m_GAdd(m_Reg(Src0), m_Reg(Src1)), m_Reg(Src2))); in TEST_F()
86 m_GMul(m_ICst(Cst), m_Reg(Src0))); in TEST_F()
94 m_GSub(m_ICst(Cst), m_Reg(Src0))); in TEST_F()
101 m_GFMul(m_ICst(Cst), m_Reg(Src0))); in TEST_F()
110 m_GFSub(m_Reg(Src0), m_Reg())); in TEST_F()
118 m_GAnd(m_Reg(Src0), m_Reg(Src1))); in TEST_F()
127 m_GOr(m_Reg(Src0), m_Reg(Src1))); in TEST_F()
[all …]
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| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 59 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) { in tryCombineAnyExt()
71 m_all_of(m_MInstr(ExtMI), m_any_of(m_GAnyExt(m_Reg(ExtSrc)), in tryCombineAnyExt()
72 m_GSExt(m_Reg(ExtSrc)), in tryCombineAnyExt()
73 m_GZExt(m_Reg(ExtSrc)))))) { in tryCombineAnyExt()
111 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc))) || in tryCombineZExt()
112 mi_match(SrcReg, MRI, m_GSExt(m_Reg(SextSrc)))) { in tryCombineZExt()
131 if (mi_match(SrcReg, MRI, m_GZExt(m_Reg(ZextSrc)))) { in tryCombineZExt()
169 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) { in tryCombineSExt()
188 m_all_of(m_MInstr(ExtMI), m_any_of(m_GZExt(m_Reg(ExtSrc)), in tryCombineSExt()
189 m_GSExt(m_Reg(ExtSrc)))))) { in tryCombineSExt()
[all …]
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| D | MIPatternMatch.h | 91 inline operand_type_match m_Reg() { return operand_type_match(); } in m_Reg() function
185 inline bind_ty<Register> m_Reg(Register &R) { return R; }
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUPostLegalizerCombiner.cpp | 85 m_GFCmp(m_Pred(Info.Pred), m_Reg(Info.LHS), m_Reg(Info.RHS)))) in matchFMinFMaxLegacy()
207 mi_match(SrcReg, MRI, m_GZExt(m_Reg(SrcReg))); in matchCvtF32UByteN()
211 bool IsShr = mi_match(SrcReg, MRI, m_GLShr(m_Reg(Src0), m_ICst(ShiftAmt))); in matchCvtF32UByteN()
212 if (IsShr || mi_match(SrcReg, MRI, m_GShl(m_Reg(Src0), m_ICst(ShiftAmt)))) { in matchCvtF32UByteN()
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| D | AMDGPUInstructionSelector.cpp | 648 Src0, *MRI, m_OneUse(m_GLShr(m_Reg(ShiftSrc0), m_SpecificICst(16)))); in selectG_BUILD_VECTOR_TRUNC()
651 Src1, *MRI, m_OneUse(m_GLShr(m_Reg(ShiftSrc1), m_SpecificICst(16)))); in selectG_BUILD_VECTOR_TRUNC()
3469 if (mi_match(Reg, MRI, m_GZExt(m_Reg(ZExtSrc)))) in matchZeroExtendFromS32()
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| D | AMDGPURegisterBankInfo.cpp | 1710 if (mi_match(Reg, MRI, m_GAdd(m_Reg(Base), m_ICst(Const)))) in getBaseWithConstantOffset()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 59 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) { in tryCombineAnyExt()
71 m_all_of(m_MInstr(ExtMI), m_any_of(m_GAnyExt(m_Reg(ExtSrc)), in tryCombineAnyExt()
72 m_GSExt(m_Reg(ExtSrc)), in tryCombineAnyExt()
73 m_GZExt(m_Reg(ExtSrc)))))) { in tryCombineAnyExt()
108 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) { in tryCombineZExt()
152 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) { in tryCombineSExt()
650 while (mi_match(Reg, MRI, m_Copy(m_Reg(TmpReg)))) { in lookThroughCopyInstrs()
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| D | MIPatternMatch.h | 69 inline operand_type_match m_Reg() { return operand_type_match(); } in m_Reg() function
163 inline bind_ty<Register> m_Reg(Register &R) { return R; }
|
| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 597 if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) in matchSextTruncSextLoad()
1768 if (!mi_match(LHS, MRI, m_GAnyExt(m_Reg(ExtSrc))) && in matchCombineShlOfExtend()
1769 !mi_match(LHS, MRI, m_GZExt(m_Reg(ExtSrc))) && in matchCombineShlOfExtend()
1770 !mi_match(LHS, MRI, m_GSExt(m_Reg(ExtSrc)))) in matchCombineShlOfExtend()
1815 while (mi_match(Reg, MRI, m_GBitcast(m_Reg(Reg)))) in peekThroughBitcast()
1963 if (!mi_match(SrcReg, MRI, m_GZExt(m_Reg(ZExtSrcReg)))) in matchCombineUnmergeZExtToZExt()
2124 m_GPtrToInt(m_all_of(m_SpecificType(DstTy), m_Reg(Reg)))); in matchCombineI2PToP2I()
2139 return mi_match(SrcReg, MRI, m_GIntToPtr(m_Reg(Reg))); in matchCombineP2IToI2P()
2162 if (mi_match(SrcReg, MRI, m_GPtrToInt(m_Reg(PtrReg.first)))) { in matchCombineAddP2IToPtrAdd()
2231 m_GTrunc(m_all_of(m_Reg(Reg), m_SpecificType(DstTy)))); in matchCombineAnyExtTrunc()
[all …]
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| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64InstructionSelector.cpp | 1050 if (mi_match(Reg, MRI, m_Neg(m_Reg(MatchReg)))) { in emitSelect()
1067 if (mi_match(Reg, MRI, m_Not(m_Reg(MatchReg)))) { in emitSelect()
1084 if (mi_match(Reg, MRI, m_GAdd(m_Reg(MatchReg), m_SpecificICst(1)))) { in emitSelect()
1985 if (!mi_match(I.getOperand(2).getReg(), MRI, m_Neg(m_Reg(NegatedReg)))) in convertPtrAddToAdd()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1289 if (mi_match(Reg, MRI, m_GAdd(m_Reg(Base), m_ICst(Const)))) in getBaseWithConstantOffset()
|