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/external/llvm/test/Transforms/InstCombine/
Dx86-movmsk.ll22 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
25 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
32 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
35 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
52 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
55 %1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
62 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
65 %1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
89 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
98 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
[all …]
/external/llvm-project/llvm/test/Transforms/InstCombine/X86/
Dx86-movmsk.ll28 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
41 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
66 %1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
79 %1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
103 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
112 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
130 %1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
139 %1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
162 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> undef)
170 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> undef)
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dcombine-movmsk-avx.ll5 declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>)
6 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>)
8 ; Use widest possible vector for movmsk comparisons (PR37087)
23 %4 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %3)
41 %4 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %3)
68 %4 = tail call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %3)
88 %3 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %2)
111 %3 = tail call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %2)
134 %3 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %2)
Dmovmsk.ll118 %1 = tail call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %x)
123 ; Don't demand any movmsk signbits -> zero
142 %2 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %1)
157 %0 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %x) nounwind
172 %1 = tail call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %0) nounwind
180 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
181 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
Dcombine-movmsk.ll7 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>)
8 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>)
11 ; Use widest possible vector for movmsk comparisons (PR37087)
34 %4 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %3)
60 %4 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %3)
201 %4 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %3)
251 %4 = tail call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %3)
278 %4 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %3)
281 %7 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %6)
Dpr17631.ll6 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>)
15 %A2 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %A1)
Davx-win64.ll27 %v.i47 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i46) nounwind readnone
44 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
D2011-11-22-AVX2-Domains.ll8 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
85 …%v.i20550 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i20549) nounwind read…
Davx512-movmsk.ll5 ; This test makes sure we don't use movmsk instructions when masked compares
7 ; scalar to vXi1 late after movmsk has been formed. Requiring it to be reversed.
Dfp-logic.ll231 define float @movmsk(float %x) {
232 ; CHECK-LABEL: movmsk:
Davx-intrinsics-x86.ll512 %res = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0) ; <i32> [#uses=1]
515 declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>) nounwind readnone
524 %res = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0) ; <i32> [#uses=1]
527 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
Dsse-intrinsics-x86.ll380 %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; <i32> [#uses=1]
383 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
Dcombine-ptest.ll302 ; testz(ashr(X,bw-1),-1) -> movmsk(X)
/external/llvm/test/CodeGen/X86/
Davx512-mask-bugfix.ll8 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) #0
23 %v0.i.i.i70 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %mask0) #0
31 %v1.i5.i.i116 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %mask0) #0
Dpr17631.ll6 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>)
15 %A2 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %A1)
Dmovmsk.ll126 %0 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %x) nounwind
141 %1 = tail call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %0) nounwind
148 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
149 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
Davx-win64.ll27 %v.i47 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i46) nounwind readnone
44 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
D2011-11-22-AVX2-Domains.ll8 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
85 …%v.i20550 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i20549) nounwind read…
Dfp-logic.ll252 define float @movmsk(float %x) {
253 ; CHECK-LABEL: movmsk:
Dsse-intrinsics-x86.ll340 %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; <i32> [#uses=1]
343 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
Davx-intrinsics-x86.ll544 %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; <i32> [#uses=1]
547 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
2644 %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; <i32> [#uses=1]
2647 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
3753 %res = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0) ; <i32> [#uses=1]
3756 declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>) nounwind readnone
3770 %res = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0) ; <i32> [#uses=1]
3773 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
Dsse2-intrinsics-x86.ll432 %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; <i32> [#uses=1]
435 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
/external/swiftshader/src/Reactor/
DSubzeroReactor.cpp2377 auto movmsk = Ice::InstIntrinsic::create(::function, 1, result, intrinsic); in SignMask() local
2378 movmsk->addArg(x.value()); in SignMask()
2379 ::basicBlock->appendInst(movmsk); in SignMask()
2489 auto movmsk = Ice::InstIntrinsic::create(::function, 1, result, intrinsic); in SignMask() local
2490 movmsk->addArg(x.value()); in SignMask()
2491 ::basicBlock->appendInst(movmsk); in SignMask()
3700 auto movmsk = Ice::InstIntrinsic::create(::function, 1, result, intrinsic); in SignMask() local
3701 movmsk->addArg(x.value()); in SignMask()
3702 ::basicBlock->appendInst(movmsk); in SignMask()
4047 auto movmsk = Ice::InstIntrinsic::create(::function, 1, result, intrinsic); in SignMask() local
[all …]
/external/swiftshader/third_party/subzero/src/
DIceAssemblerX86Base.h488 void movmsk(Type Ty, GPRRegister dst, XmmRegister src);
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DDataMov.cpp991 TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmsk); \ in TEST_F()

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