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Searched refs:new_reg (Results 1 – 15 of 15) sorted by relevance

/external/mesa3d/src/freedreno/ir3/
Dir3_parser.y137 static struct ir3_register * new_reg(int num, unsigned flags) in new_reg() function
151 return new_reg(0, 0); in dummy_dst()
797 cat6_prefetch: T_OP_PREFETCH { new_instr(OPC_PREFETCH); new_reg(0,0); /* dummy dst */ } 'g' '['…
829 reg: T_REGISTER { $$ = new_reg($1, 0); }
830 | T_A0 { $$ = new_reg((61 << 3) + $1, IR3_REG_HALF); }
831 | T_P0 { $$ = new_reg((62 << 3) + $1, 0); }
833 const: T_CONSTANT { $$ = new_reg($1, IR3_REG_CONST); }
875 relative: 'r' '<' T_A0 offset '>' { new_reg(0, IR3_REG_RELATIV)->array.offset = $4; }
876 | 'c' '<' T_A0 offset '>' { new_reg(0, IR3_REG_RELATIV | IR3_REG_CONST)->array.of…
877 | T_HR '<' T_A0 offset '>' { new_reg(0, IR3_REG_RELATIV | IR3_REG_HALF)->array.of…
[all …]
Dir3.c1093 struct ir3_register *new_reg = in ir3_instr_clone() local
1095 *new_reg = *reg; in ir3_instr_clone()
1122 struct ir3_register *new_reg = reg_create(shader, 0, 0); in ir3_reg_clone() local
1123 *new_reg = *reg; in ir3_reg_clone()
1124 return new_reg; in ir3_reg_clone()
/external/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_instruction_base.cpp78 v.set_reg_i(i,m_values.get_or_inject(ns_idx.new_reg, v.reg_i(i)->chan())); in remap()
88 reg = m_values.get_or_inject(new_index.new_reg, reg->chan()); in remap_one_registers()
Dsfn_instruction_export.cpp191 m_address = values.get_or_inject(new_index.new_reg, m_address->chan()); in remap_registers_child()
328 m_index = values.get_or_inject(new_index.new_reg, m_index->chan()); in remap_registers_child()
Dsfn_instruction_base.h45 int new_reg; member
Dsfn_instruction_alu.cpp133 reg = values.get_or_inject(new_index.new_reg, reg->chan()); in remap_one_registers()
Dsfn_shader_base.cpp178 sh_info.input[i].gpr = new_index.new_reg; in remap_shader_info()
186 sh_info.output[i].gpr = new_index.new_reg; in remap_shader_info()
209 sfn_log << SfnLog::merge << "Map:" << i << " -> " << register_map[i].new_reg << "\n"; in remap_registers()
230 i.new_reg = new_index++; in remap_registers()
Dsfn_liverange.cpp966 result[src->reg].new_reg = trgt->reg; in get_temp_registers_remapping()
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi_private.h166 int new_reg; member
Dst_glsl_to_tgsi_temprename.cpp1368 result[src->reg].new_reg = trgt->reg; in get_temp_registers_remapping()
Dst_glsl_to_tgsi.cpp4949 src->index = renames[old_idx].new_reg; in rename_temp_handle_src()
4979 inst->dst[j].index = renames[old_idx].new_reg; in rename_temp_registers()
5740 renames[i].new_reg = new_index; in renumber_registers()
/external/mesa3d/src/mesa/state_tracker/tests/
Dst_tests_common.cpp596 remap[i] = result[i].valid ? result[i].new_reg : i; in run()
601 return rn.valid ? rn.new_reg : x; in run()
/external/gemmlowp/meta/generators/
Dneon_emitter_64.py178 new_reg = reg.Copy()
179 new_reg.register_bits = bits
180 return new_reg
/external/igt-gpu-tools/assembler/
Dgram.y687 struct declared_register reg, *found, *new_reg; variable
703 new_reg = malloc(sizeof(struct declared_register));
704 *new_reg = reg;
705 insert_register(new_reg);
/external/libpcap/
Dgencode.c171 #define PUSH_LINKHDR(cs, new_linktype, new_is_variable, new_constant_part, new_reg) \ argument
178 (cs)->off_linkhdr.reg = (new_reg); \