| /external/rust/crates/ring/pregenerated/ |
| D | sha512-x86_64-elf.S | 36 pushq %r12
37 .cfi_offset %r12,-32
70 movq 0(%rsi),%r12
73 bswapq %r12
81 movq %r12,0(%rsp)
86 addq %r11,%r12
91 addq %r15,%r12
94 addq (%rbp),%r12
103 addq %r13,%r12
106 addq %r12,%rdx
[all …]
|
| D | sha512-x86_64-macosx.S | 35 pushq %r12
69 movq 0(%rsi),%r12
72 bswapq %r12
80 movq %r12,0(%rsp)
85 addq %r11,%r12
90 addq %r15,%r12
93 addq (%rbp),%r12
102 addq %r13,%r12
105 addq %r12,%rdx
106 addq %r12,%r11
[all …]
|
| /external/openscreen/third_party/boringssl/linux-x86_64/crypto/fipsmodule/ |
| D | sha512-x86_64.S | 39 pushq %r12
40 .cfi_offset %r12,-32
73 movq 0(%rsi),%r12
76 bswapq %r12
84 movq %r12,0(%rsp)
89 addq %r11,%r12
94 addq %r15,%r12
97 addq (%rbp),%r12
106 addq %r13,%r12
109 addq %r12,%rdx
[all …]
|
| /external/rust/crates/quiche/deps/boringssl/linux-x86_64/crypto/fipsmodule/ |
| D | sha512-x86_64.S | 39 pushq %r12
40 .cfi_offset %r12,-32
73 movq 0(%rsi),%r12
76 bswapq %r12
84 movq %r12,0(%rsp)
89 addq %r11,%r12
94 addq %r15,%r12
97 addq (%rbp),%r12
106 addq %r13,%r12
109 addq %r12,%rdx
[all …]
|
| /external/boringssl/linux-x86_64/crypto/fipsmodule/ |
| D | sha512-x86_64.S | 39 pushq %r12
40 .cfi_offset %r12,-32
73 movq 0(%rsi),%r12
76 bswapq %r12
84 movq %r12,0(%rsp)
89 addq %r11,%r12
94 addq %r15,%r12
97 addq (%rbp),%r12
106 addq %r13,%r12
109 addq %r12,%rdx
[all …]
|
| /external/openscreen/third_party/boringssl/mac-x86_64/crypto/fipsmodule/ |
| D | sha512-x86_64.S | 38 pushq %r12
72 movq 0(%rsi),%r12
75 bswapq %r12
83 movq %r12,0(%rsp)
88 addq %r11,%r12
93 addq %r15,%r12
96 addq (%rbp),%r12
105 addq %r13,%r12
108 addq %r12,%rdx
109 addq %r12,%r11
[all …]
|
| /external/boringssl/mac-x86_64/crypto/fipsmodule/ |
| D | sha512-x86_64.S | 38 pushq %r12
72 movq 0(%rsi),%r12
75 bswapq %r12
83 movq %r12,0(%rsp)
88 addq %r11,%r12
93 addq %r15,%r12
96 addq (%rbp),%r12
105 addq %r13,%r12
108 addq %r12,%rdx
109 addq %r12,%r11
[all …]
|
| /external/rust/crates/quiche/deps/boringssl/mac-x86_64/crypto/fipsmodule/ |
| D | sha512-x86_64.S | 38 pushq %r12
72 movq 0(%rsi),%r12
75 bswapq %r12
83 movq %r12,0(%rsp)
88 addq %r11,%r12
93 addq %r15,%r12
96 addq (%rbp),%r12
105 addq %r13,%r12
108 addq %r12,%rdx
109 addq %r12,%r11
[all …]
|
| /external/libxaac/decoder/armv7/ |
| D | ixheaacd_shiftrountine.s | 31 STMFD sp!, {r4-r7, r12}
32 MOV r12, #0x1f
35 CMP r3, r12
36 MOVGT r3, r12
38 @ LDMMIFD sp!, {r4-r7, r12}
39 LDMFDMI sp!, {r4-r7, r12}
42 LDR r12, [r0, #0]
44 MOV r12, r12, ASR r3
46 STR r12, [r0], #4
49 LDR r12, [r0, #0]
[all …]
|
| D | ixheaacd_harm_idx_zerotwolp.s | 26 STMFD sp!, {r4-r12}
30 LDR r12, [sp, #48]
36 CMP r12, #0
42 LDR r12, [r0, #0]
47 SMULWB r7, r12, r7
50 LDRH r12, [r3], #4
55 MOVS r12, r12, LSL #16
59 QADDEQ r8, r8, r12
60 QSUBNE r8, r8, r12
68 ADD r12, r10, r2, LSL #2
[all …]
|
| D | ixheaacd_aac_ld_dec_rearrange.s | 6 STMFD r13!, {r4 - r12, r14}
28 LDMIA r4, {r12, r14} @ r12 = inp[idx] and r14 = inp[idx+1]
29 STMIA r1!, {r12, r14} @ *buf1++ = inp[idx] and *buf1++ = inp[idx+1]
30 LDMIA r5, {r12, r14} @ r12 = inp[idx] and r14 = inp[idx+1]
31 STMIA r1!, {r12, r14} @ *buf1++ = inp[idx] and *buf1++ = inp[idx+1]
32 LDMIA r6, {r12, r14} @ r12 = inp[idx] and r14 = inp[idx+1]
33 STMIA r1!, {r12, r14} @ *buf1++ = inp[idx] and *buf1++ = inp[idx+1]
34 LDMIA r7, {r12, r14} @ r12 = inp[idx] and r14 = inp[idx+1]
35 STMIA r1!, {r12, r14} @ *buf1++ = inp[idx] and *buf1++ = inp[idx+1]
36 LDMIA r8, {r12, r14} @ r12 = inp[idx] and r14 = inp[idx+1]
[all …]
|
| D | ixheaacd_autocorr_st2.s | 26 STMFD sp!, {r4-r12, r14}
74 ADD r12, r1, #64*4
83 LDR r7 , [r12, #4*128]!
97 LDR r5 , [r12, #4*128]!
119 LDR r7 , [r12, #4*128]!
144 MOV r12, r11
151 SMLAWT r12, r6 , r6, r12
154 SMLAWT r12, r7 , r7, r12
171 STR r12, [r0, #4]
186 LDR r12, [r1, #-4*128]
[all …]
|
| D | ixheaacd_mps_complex_fft_64_asm.s | 8 STMFD sp!, {r0-r12, lr}
14 SUB r12, r0, #16 @dig_rev_shift = norm32(npoints) + 1 -16@
24 MOV r12, r4
26 LDRB r10, [r12, r0, LSR #2]
62 MOV r12, #0x40 @nodespacing = 64@
63 STR r12, [sp, #0x38]
64 LDR r12, [sp, #0x48]
68 MOV r4, r12, ASR #4
75 LDR r12, [sp, #0x50] @WORD32 *data = ptr_y@
81 LDRD r4, [r12] @r4=x0r, r5=x0i
[all …]
|
| /external/rust/crates/ring/pregenerated/tmp/ |
| D | sha512-x86_64-nasm.asm | 41 push r12
75 mov r12,QWORD[rsi]
78 bswap r12
86 mov QWORD[rsp],r12
91 add r12,r11
96 add r12,r15
99 add r12,QWORD[rbp]
108 add r12,r13
111 add rdx,r12
112 add r11,r12
[all …]
|
| /external/boringssl/win-x86_64/crypto/fipsmodule/ |
| D | sha512-x86_64.asm | 45 push r12
79 mov r12,QWORD[rsi]
82 bswap r12
90 mov QWORD[rsp],r12
95 add r12,r11
100 add r12,r15
103 add r12,QWORD[rbp]
112 add r12,r13
115 add rdx,r12
116 add r11,r12
[all …]
|
| /external/openscreen/third_party/boringssl/win-x86_64/crypto/fipsmodule/ |
| D | sha512-x86_64.asm | 45 push r12
79 mov r12,QWORD[rsi]
82 bswap r12
90 mov QWORD[rsp],r12
95 add r12,r11
100 add r12,r15
103 add r12,QWORD[rbp]
112 add r12,r13
115 add rdx,r12
116 add r11,r12
[all …]
|
| /external/llvm-project/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-6xx.s | 8 mfibatu %r12, 0
11 mfibatl %r12, 0
14 mfibatu %r12, 1
17 mfibatl %r12, 1
20 mfibatu %r12, 2
23 mfibatl %r12, 2
26 mfibatu %r12, 3
29 mfibatl %r12, 3
32 mtibatu 0, %r12
35 mtibatl 0, %r12
[all …]
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-6xx.s | 8 mfibatu %r12, 0
11 mfibatl %r12, 0
14 mfibatu %r12, 1
17 mfibatl %r12, 1
20 mfibatu %r12, 2
23 mfibatl %r12, 2
26 mfibatu %r12, 3
29 mfibatl %r12, 3
32 mtibatu 0, %r12
35 mtibatl 0, %r12
[all …]
|
| /external/boringssl/ios-arm/crypto/fipsmodule/ |
| D | aes-armv4.S | 195 stmdb sp!,{r1,r4-r12,lr}
201 mov r12,r0 @ inp
204 ldrb r0,[r12,#3] @ load input data in endian-neutral
205 ldrb r4,[r12,#2] @ manner...
206 ldrb r5,[r12,#1]
207 ldrb r6,[r12,#0]
209 ldrb r1,[r12,#7]
211 ldrb r4,[r12,#6]
213 ldrb r5,[r12,#5]
214 ldrb r6,[r12,#4]
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-rd-rn-rm-t32.cc | 100 {{{r2, r10, r12}, false, al, "r2 r10 r12", "r2_r10_r12"},
105 {{r12, r3, r1}, false, al, "r12 r3 r1", "r12_r3_r1"},
115 {{r12, r12, r9}, false, al, "r12 r12 r9", "r12_r12_r9"},
116 {{r12, r10, r12}, false, al, "r12 r10 r12", "r12_r10_r12"},
117 {{r4, r10, r12}, false, al, "r4 r10 r12", "r4_r10_r12"},
119 {{r11, r12, r2}, false, al, "r11 r12 r2", "r11_r12_r2"},
121 {{r12, r2, r6}, false, al, "r12 r2 r6", "r12_r2_r6"},
122 {{r12, r8, r4}, false, al, "r12 r8 r4", "r12_r8_r4"},
128 {{r7, r12, r0}, false, al, "r7 r12 r0", "r7_r12_r0"},
135 {{r8, r12, r13}, false, al, "r8 r12 r13", "r8_r12_r13"},
[all …]
|
| D | test-assembler-rd-rn-rm-a32.cc | 100 {{{r2, r10, r12}, false, al, "r2 r10 r12", "r2_r10_r12"},
105 {{r12, r3, r1}, false, al, "r12 r3 r1", "r12_r3_r1"},
115 {{r12, r12, r9}, false, al, "r12 r12 r9", "r12_r12_r9"},
116 {{r12, r10, r12}, false, al, "r12 r10 r12", "r12_r10_r12"},
117 {{r4, r10, r12}, false, al, "r4 r10 r12", "r4_r10_r12"},
119 {{r11, r12, r2}, false, al, "r11 r12 r2", "r11_r12_r2"},
121 {{r12, r2, r6}, false, al, "r12 r2 r6", "r12_r2_r6"},
122 {{r12, r8, r4}, false, al, "r12 r8 r4", "r12_r8_r4"},
128 {{r7, r12, r0}, false, al, "r7 r12 r0", "r7_r12_r0"},
135 {{r8, r12, r13}, false, al, "r8 r12 r13", "r8_r12_r13"},
[all …]
|
| /external/tremolo/Tremolo/ |
| D | mdctLARM.s | 68 LDMDB r2!,{r5,r6,r7,r12}
73 MOV r12,r12,ASR #9 @ r12= (*--r)>>9
75 MOV r14,r12,ASR #15
77 EORNE r12,r4, r14,ASR #31
78 STRH r12,[r0], r3
128 LDR r12,[r2],#8
133 RSB r12,r12,#0
138 MOV r12, r12,ASR #9 @ r12= (-*l)>>9
143 MOV r14,r12,ASR #15
145 EORNE r12,r4, r14,ASR #31
[all …]
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | gas-compl-mem-offset-paren.s | 3 @ CHECK: ldr r12, [sp, #15]
4 ldr r12, [sp, (15)]
6 @ CHECK: ldr r12, [sp, #15]
7 ldr r12, [sp, #(15)]
9 @ CHECK: ldr r12, [sp, #15]
10 ldr r12, [sp, $(15)]
12 @ CHECK: ldr r12, [sp, #100]
13 ldr r12, [sp, (((15+5)*5))]
15 @ CHECK: ldr r12, [sp, #100]
16 ldr r12, [sp, #(((15+5)*5))]
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/MSP430/ |
| D | setcc.ll | 12 ; CHECK: bit r13, r12
13 ; CHECK: mov r2, r12
14 ; CHECK: rra r12
15 ; CHECK: and #1, r12
24 ; CHECK: bit r13, r12
25 ; CHECK: mov r2, r12
26 ; CHECK: and #1, r12
34 ; CHECK: cmp r13, r12
37 ; CHECK: mov #1, r12
38 ; CHECK: bic r13, r12
[all …]
|
| /external/libhevc/common/arm/ |
| D | ihevc_intra_pred_chroma_horz.s | 101 stmfd sp!, {r4-r12, r14} @stack stores the values of the arguments
108 add r12,r0,r6 @*pu1_ref[four_nt]
118 sub r12,r12,#16 @move to 16th value pointer
122 vld1.16 {q0},[r12] @load 16 values. d1[7] will have the 1st value.
123 sub r12,r12,#16
124 vld1.16 {q5},[r12] @load 16 values. d1[7] will have the 1st value.
180 sub r12,r12,#16 @move to 16th value pointer
194 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
198 ldrb lr,[r12],#1 @pu1_ref[two_nt]
199 @vld1.8 {q15},[r12] @pu1_ref[two_nt + 1 + col]
[all …]
|