| /external/mesa3d/src/freedreno/decode/scripts/ |
| D | analyze.lua | 77 for regbase=0,0xffff do
78 if regs.written(regbase) ~= 0 then
79 local regval = regs.val(regbase)
82 regtbl[regbase] = regval
85 local uniq_regvals = results[gpuname]["regvals"][regbase]
88 results[gpuname]["regvals"][regbase] = uniq_regvals;
147 for regbase,regvals in pairs(gpu["regvals"]) do
152 gpuname, rnn.regname(r, regbase),
153 regval, rnn.regval(r, regbase, regval)))
166 for regbase,regvals in pairs(gpu["regvals"]) do
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| /external/mesa3d/src/freedreno/decode/ |
| D | rnnutil.c | 38 static struct rnndomain *finddom(struct rnn *rnn, uint32_t regbase) in finddom() argument
40 if (rnndec_checkaddr(rnn->vc, rnn->dom[0], regbase, 0)) in finddom()
117 uint32_t regbase = rnndec_decodereg(rnn->vc_nocolor, rnn->dom[0], name); in rnn_regbase() local
118 if (!regbase) in rnn_regbase()
119 regbase = rnndec_decodereg(rnn->vc_nocolor, rnn->dom[1], name); in rnn_regbase()
120 return regbase; in rnn_regbase()
123 const char *rnn_regname(struct rnn *rnn, uint32_t regbase, int color) in rnn_regname() argument
129 finddom(rnn, regbase), regbase, 0); in rnn_regname()
139 struct rnndecaddrinfo *rnn_reginfo(struct rnn *rnn, uint32_t regbase) in rnn_reginfo() argument
141 return rnndec_decodeaddr(rnn->vc, finddom(rnn, regbase), regbase, 0); in rnn_reginfo()
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| D | cffdec.h | 79 uint32_t regbase(const char *name);
80 const char * regname(uint32_t regbase, int color);
81 bool reg_written(uint32_t regbase);
82 uint32_t reg_lastval(uint32_t regbase);
83 uint32_t reg_val(uint32_t regbase);
84 void reg_set(uint32_t regbase, uint32_t val);
87 void dump_register_val(uint32_t regbase, uint32_t dword, int level);
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| D | cffdec.c | 288 static bool reg_rewritten(uint32_t regbase) in reg_rewritten() argument
290 return !!(type0_reg_rewritten[regbase/8] & (1 << (regbase % 8))); in reg_rewritten()
293 bool reg_written(uint32_t regbase) in reg_written() argument
295 return !!(type0_reg_written[regbase/8] & (1 << (regbase % 8))); in reg_written()
309 uint32_t reg_lastval(uint32_t regbase) in reg_lastval() argument
311 return lastvals[regbase]; in reg_lastval()
321 reg_val(uint32_t regbase) in reg_val() argument
323 return type0_reg_vals[regbase]; in reg_val()
327 reg_set(uint32_t regbase, uint32_t val) in reg_set() argument
329 assert(regbase < regcnt()); in reg_set()
[all …]
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| D | script.c | 70 static uint32_t rnn_val(struct rnn *rnn, uint32_t regbase) in rnn_val() argument
75 return reg_val(regbase); in rnn_val()
76 } else if (regbase < rnndec->sizedwords) { in rnn_val()
77 return rnndec->dwords[regbase]; in rnn_val()
479 uint32_t regbase = (uint32_t)lua_tonumber(L, 2); in l_rnn_regname() local
480 lua_pushstring(L, rnn_regname(rnn, regbase, 1)); in l_rnn_regname()
487 uint32_t regbase = (uint32_t)lua_tonumber(L, 2); in l_rnn_regval() local
489 struct rnndecaddrinfo *info = rnn_reginfo(rnn, regbase); in l_rnn_regval()
520 uint32_t regbase = (uint32_t)lua_tonumber(L, 1); in l_reg_written() local
521 lua_pushnumber(L, reg_written(regbase)); in l_reg_written()
[all …]
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| D | rnnutil.h | 57 const char *rnn_regname(struct rnn *rnn, uint32_t regbase, int color);
58 struct rnndecaddrinfo *rnn_reginfo(struct rnn *rnn, uint32_t regbase);
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| D | crashdec.c | 83 unsigned reg = regbase(name); in regval64()
94 unsigned reg = regbase(name); in regval()
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| /external/mesa3d/src/freedreno/afuc/ |
| D | disasm.c | 55 static void print_gpu_reg(uint32_t regbase) in print_gpu_reg() argument
59 if (regbase < 0x100) in print_gpu_reg()
62 if (rnndec_checkaddr(ctx, dom[0], regbase, 0)) in print_gpu_reg()
64 else if (rnndec_checkaddr(ctx, dom[1], regbase, 0)) in print_gpu_reg()
68 struct rnndecaddrinfo *info = rnndec_decodeaddr(ctx, d, regbase, 0); in print_gpu_reg()
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| /external/cpuinfo/test/dmesg/ |
| D | galaxy-grand-prime-value-edition.log | 508 <6>[ 0.491699] [1: swapper/0: 1] [c1] sprd spi 70a00000.spi: probe spi 0 get regbase 0x…
513 <6>[ 0.491943] [1: swapper/0: 1] [c1] sprd spi 70b00000.spi: probe spi 1 get regbase 0x…
518 <6>[ 0.492187] [1: swapper/0: 1] [c1] sprd spi 70c00000.spi: probe spi 2 get regbase 0x…
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