Searched refs:ret8 (Results 1 – 12 of 12) sorted by relevance
| /external/llvm-project/clang/test/CodeGen/ |
| D | ppc32-and-aix-struct-return.c | 88 Eight ret8(void) { return (Eight){123, 'a'}; } in ret8() function
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| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-ret.ll | 83 define zeroext i32 @ret8(i32 signext %a) nounwind {
85 ; ELF64-LABEL: ret8
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-ret.ll | 87 define zeroext i32 @ret8(i32 signext %a) nounwind {
89 ; ELF64-LABEL: ret8
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| /external/llvm-project/llvm/test/CodeGen/SystemZ/ |
| D | bswap-02.ll | 125 %ret8 = add i32 %ret7, %swapped8
126 %ret9 = add i32 %ret8, %swapped9
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| D | bswap-03.ll | 125 %ret8 = add i64 %ret7, %swapped8
126 %ret9 = add i64 %ret8, %swapped9
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| /external/llvm/test/CodeGen/NVPTX/ |
| D | envreg.ll | 114 %ret8 = add i32 %ret7, %val9
115 %ret9 = add i32 %ret8, %val10
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| /external/llvm-project/llvm/test/CodeGen/NVPTX/ |
| D | envreg.ll | 114 %ret8 = add i32 %ret7, %val9
115 %ret9 = add i32 %ret8, %val10
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| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | var-permute-256.ll | 254 %ret8 = insertelement <16 x i16> %ret7, i16 %v8, i32 8
255 %ret9 = insertelement <16 x i16> %ret8, i16 %v9, i32 9
407 %ret8 = insertelement <32 x i8> %ret7, i8 %v8, i32 8
408 %ret9 = insertelement <32 x i8> %ret8, i8 %v9, i32 9
802 %ret8 = insertelement <16 x i16> %ret7, i16 %v8, i32 8
803 %ret9 = insertelement <16 x i16> %ret8, i16 %v9, i32 9
953 %ret8 = insertelement <32 x i8> %ret7, i8 %v8, i32 8
954 %ret9 = insertelement <32 x i8> %ret8, i8 %v9, i32 9
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| D | var-permute-128.ll | 366 %ret8 = insertelement <16 x i8> %ret7, i8 %v8, i32 8
367 %ret9 = insertelement <16 x i8> %ret8, i8 %v9, i32 9
631 %ret8 = insertelement <16 x i8> %ret7, i8 %v8, i32 8
632 %ret9 = insertelement <16 x i8> %ret8, i8 %v9, i32 9
1094 %ret8 = insertelement <16 x i8> %ret7, i8 %v8, i32 8
1095 %ret9 = insertelement <16 x i8> %ret8, i8 %v9, i32 9
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| D | var-permute-512.ll | 83 %ret8 = insertelement <16 x i32> %ret7, i32 %v8, i32 8
84 %ret9 = insertelement <16 x i32> %ret8, i32 %v9, i32 9
296 %ret8 = insertelement <32 x i16> %ret7, i16 %v8, i32 8
297 %ret9 = insertelement <32 x i16> %ret8, i16 %v9, i32 9
914 %ret8 = insertelement <64 x i8> %ret7, i8 %v8, i32 8
915 %ret9 = insertelement <64 x i8> %ret8, i8 %v9, i32 9
1050 %ret8 = insertelement <16 x float> %ret7, float %v8, i32 8
1051 %ret9 = insertelement <16 x float> %ret8, float %v9, i32 9
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.td | 18 list<SubRegIndex> ret8 = [sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7];
36 !if(!eq(size, 8), ret8,
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.td | 61 list<SubRegIndex> ret8 = [sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7];
80 !if(!eq(size, 8), ret8,
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