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Searched refs:riscv_masked_atomicrmw_xchg_i32 (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicsRISCV.h30 riscv_masked_atomicrmw_xchg_i32, // llvm.riscv.masked.atomicrmw.xchg.i32 enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp246 case Intrinsic::riscv_masked_atomicrmw_xchg_i32: in getTgtMemIntrinsic()
2768 return Intrinsic::riscv_masked_atomicrmw_xchg_i32; in getIntrinsicForMaskedAtomicRMWBinOp()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp370 case Intrinsic::riscv_masked_atomicrmw_xchg_i32: in getTgtMemIntrinsic()
3479 return Intrinsic::riscv_masked_atomicrmw_xchg_i32; in getIntrinsicForMaskedAtomicRMWBinOp()