/external/arm-trusted-firmware/lib/el3_runtime/aarch64/ |
D | context_mgmt.c | 68 u_register_t scr_el3; in cm_setup_context() local 89 scr_el3 = read_scr(); in cm_setup_context() 90 scr_el3 &= ~(SCR_NS_BIT | SCR_RW_BIT | SCR_FIQ_BIT | SCR_IRQ_BIT | in cm_setup_context() 96 scr_el3 |= SCR_NS_BIT; in cm_setup_context() 102 scr_el3 |= SCR_RW_BIT; in cm_setup_context() 109 scr_el3 |= SCR_ST_BIT; in cm_setup_context() 116 scr_el3 |= SCR_TERR_BIT; in cm_setup_context() 125 scr_el3 &= ~SCR_EA_BIT; in cm_setup_context() 130 scr_el3 |= SCR_FIEN_BIT; in cm_setup_context() 144 scr_el3 |= SCR_API_BIT | SCR_APK_BIT; in cm_setup_context() [all …]
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D | context.S | 779 mrs x10, scr_el3 855 mrs x0, scr_el3 964 msr scr_el3, x18
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/external/arm-trusted-firmware/bl31/ |
D | interrupt_mgmt.c | 39 u_register_t scr_el3[2]; member 83 u_register_t scr_el3; in get_scr_el3_from_routing_model() local 86 scr_el3 = intr_type_descs[INTR_TYPE_NS].scr_el3[security_state]; in get_scr_el3_from_routing_model() 87 scr_el3 |= intr_type_descs[INTR_TYPE_S_EL1].scr_el3[security_state]; in get_scr_el3_from_routing_model() 88 scr_el3 |= intr_type_descs[INTR_TYPE_EL3].scr_el3[security_state]; in get_scr_el3_from_routing_model() 89 return scr_el3; in get_scr_el3_from_routing_model() 106 intr_type_descs[type].scr_el3[security_state] = (u_register_t)flag << bit_pos; in set_scr_el3_from_rm()
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/external/arm-trusted-firmware/plat/arm/common/ |
D | arm_common.c | 200 u_register_t scr_el3; in plat_sdei_validate_entry_point() local 203 scr_el3 = read_scr_el3(); in plat_sdei_validate_entry_point() 204 write_scr_el3(scr_el3 | SCR_NS_BIT); in plat_sdei_validate_entry_point() 225 write_scr_el3(scr_el3); in plat_sdei_validate_entry_point()
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/external/arm-trusted-firmware/plat/renesas/common/ |
D | plat_pm.c | 60 u_register_t scr_el3 = read_scr_el3(); in rcar_cpu_standby() local 62 write_scr_el3(scr_el3 | SCR_IRQ_BIT); in rcar_cpu_standby() 65 write_scr_el3(scr_el3); in rcar_cpu_standby()
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/external/arm-trusted-firmware/lib/cpus/aarch64/ |
D | wa_cve_2017_5715_bpiall.S | 48 mrs x5, scr_el3 81 msr scr_el3, xzr 275 msr scr_el3, x5
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/external/arm-trusted-firmware/bl31/aarch64/ |
D | ea_delegate.S | 253 mrs x4, scr_el3 303 msr scr_el3, x3
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D | runtime_exceptions.S | 268 mrs x2, scr_el3 499 mrs x18, scr_el3
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D | crash_reporting.S | 392 mrs x8, scr_el3
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/external/arm-trusted-firmware/bl1/aarch64/ |
D | bl1_exceptions.S | 157 mrs x30, scr_el3 272 mrs x18, scr_el3
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/external/arm-trusted-firmware/drivers/arm/gic/v3/ |
D | gicv3_main.c | 279 u_register_t scr_el3; in gicv3_cpuif_enable() local 302 scr_el3 = read_scr_el3(); in gicv3_cpuif_enable() 308 write_scr_el3(scr_el3 | SCR_NS_BIT); in gicv3_cpuif_enable() 316 write_scr_el3(scr_el3 & (~SCR_NS_BIT)); in gicv3_cpuif_enable()
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/external/arm-trusted-firmware/include/arch/aarch64/ |
D | el3_common_macros.S | 91 msr scr_el3, x0
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D | arch_helpers.h | 364 DEFINE_SYSREG_RW_FUNCS(scr_el3) in DEFINE_SYSREG_READ_FUNC()
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 1539 0x0c,0x11,0x1e,0xd5 = msr scr_el3, x12 1845 0x09,0x11,0x3e,0xd5 = mrs x9, scr_el3
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/external/arm-trusted-firmware/docs/design/ |
D | interrupt-framework-design.rst | 236 uint32_t scr_el3[2]; 248 The ``scr_el3[2]`` field also stores the routing model but as a mapping of the
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D | firmware-design.rst | 1217 scr_el3 = 0x000000000003073d
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 3265 # CHECK: msr {{scr_el3|SCR_EL3}}, x12 3557 # CHECK: mrs x9, {{scr_el3|SCR_EL3}}
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/external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 3252 # CHECK: msr {{scr_el3|SCR_EL3}}, x12 3546 # CHECK: mrs x9, {{scr_el3|SCR_EL3}}
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