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Searched refs:select_or (Results 1 – 8 of 8) sorted by relevance

/external/llvm/test/CodeGen/ARM/
Dmovcc-double.ll20 define i32 @select_or(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5) {
23 ; CHECK-LABEL: select_or
/external/llvm-project/llvm/test/CodeGen/ARM/
Dmovcc-double.ll20 define i32 @select_or(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5) {
23 ; CHECK-LABEL: select_or
/external/llvm/test/CodeGen/X86/
Dcmov-double.ll21 define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) {
24 ; CHECK-LABEL: select_or
/external/llvm-project/llvm/test/CodeGen/X86/
Dcmov-double.ll27 define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) {
28 ; CHECK-LABEL: select_or:
Dselect.ll1407 define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1408 ; CHECK-LABEL: select_or:
1416 ; ATHLON-LABEL: select_or:
1425 ; MCU-LABEL: select_or:
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_perfcounter.c105 unsigned select_or; member
323 .select_or = S_036700_SQC_BANK_MASK(15) | S_036700_SQC_CLIENT_MASK(15) | S_036700_SIMD_MASK(15),
762 radeon_emit(cs, selectors[idx] | regs->select_or); in si_pc_emit_select()
774 radeon_emit(cs, selectors[idx] | regs->select_or); in si_pc_emit_select()
785 radeon_emit(cs, selectors[idx] | regs->select_or); in si_pc_emit_select()
795 radeon_set_uconfig_reg(cs, *reg++, selectors[idx] | regs->select_or); in si_pc_emit_select()
812 radeon_emit(cs, selectors[idx] | regs->select_or); in si_pc_emit_select()
823 radeon_emit(cs, selectors[idx - 1] | regs->select_or); in si_pc_emit_select()
/external/llvm/test/CodeGen/AArch64/
Darm64-ccmp.ll307 ; CHECK-LABEL: select_or
308 define i64 @select_or(i32 %w0, i32 %w1, i64 %x2, i64 %x3) {
/external/llvm-project/llvm/test/CodeGen/AArch64/
Darm64-ccmp.ll308 ; CHECK-LABEL: select_or
309 define i64 @select_or(i32 %w0, i32 %w1, i64 %x2, i64 %x3) {