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Searched refs:sgprs (Results 1 – 17 of 17) sorted by relevance

/external/mesa3d/src/amd/compiler/
Daco_live_var_analysis.cpp296 uint16_t sgprs = addressable_sgprs + get_extra_sgprs(program); in get_sgpr_alloc() local
298 return align(std::max(sgprs, granule), granule); in get_sgpr_alloc()
310 uint16_t sgprs = program->physical_sgprs / max_waves & ~program->sgpr_alloc_granule; in get_addr_sgpr_from_waves() local
311 sgprs -= get_extra_sgprs(program); in get_addr_sgpr_from_waves()
312 return std::min(sgprs, program->sgpr_limit); in get_addr_sgpr_from_waves()
/external/llvm/test/CodeGen/AMDGPU/
Damdgcn.work-item-intrinsics.ll19 ; The workgroup.id values are stored in sgprs offset by the number of user
20 ; sgprs.
Damdgpu.work-item-intrinsics.deprecated.ll159 ; The tgid values are stored in sgprs offset by the number of user
160 ; sgprs.
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dwave_dispatch_regs.ll5 ; This compute shader has input args that claim that it has 17 sgprs and 5 vgprs
Dinline-asm.ll206 ; FIXME: Should not have intermediate sgprs
Dmfma-loop.ll40 ; Check that we do not use 32 temp sgprs as well.
Dgfx-callable-argument-types.ll3350 ; inreg arguments are put in sgprs
/external/llvm/lib/Target/AMDGPU/Utils/
DAMDKernelCodeTInfo.h100 COMPPGM1(sgprs, SGPRS),
/external/mesa3d/docs/relnotes/
D19.1.7.rst125 - radv: fix allocating number of user sgprs if streamout is used
D20.3.4.rst152 - radeonsi: invalidate compute sgprs in si_rebind_buffer
D19.2.0.rst390 - radv: fix allocating number of user sgprs if streamout is used
D20.0.0.rst2822 - aco: better handle neg/abs of sgprs
2832 - aco: combine two sgprs into a VALU if they're the same
2840 - aco: allow applying two sgprs to an instruction
2873 - aco: always add sgprs to sgpr_ids when choosing literals
D19.3.0.rst2835 - aco: don't apply sgprs/constants to read/write lane instructions
2857 - radv: round vgprs/sgprs before calculating max_waves
3101 - radv: fix allocating number of user sgprs if streamout is used
D20.1.0.rst3513 - aco: only reserve sgprs for vcc if it's used
3596 - aco: improve sub-dword emit_split_vector() with sgprs
3983 - aco: fix f2i64/f2u64 with sgprs if the exponent computation overflow
D20.3.0.rst4007 - aco: reserve 2 sgprs for each branch
4033 - aco: fix v_writelane_b32 with two sgprs
D20.2.0.rst3956 - aco: reserve 2 sgprs for each branch
3961 - aco: fix v_writelane_b32 with two sgprs
/external/mesa3d/src/amd/vulkan/
Dradv_shader.c1548 unsigned sgprs = align(conf->num_sgprs, chip_class >= GFX8 ? 16 : 8); in radv_get_max_waves() local
1552 sgprs); in radv_get_max_waves()