| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-mul.ll | 62 ; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
147 ; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
|
| D | dp-3source.ll | 51 ; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
|
| D | aarch64-fix-cortex-a53-835769.ll | 185 ; CHECK-NEXT: smsubl
188 ; CHECK-NOWORKAROUND-NEXT: smsubl
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-mul.ll | 62 ; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
147 ; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
|
| D | dp-3source.ll | 51 ; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
|
| D | aarch64-fix-cortex-a53-835769.ll | 185 ; CHECK-NEXT: smsubl
188 ; CHECK-NOWORKAROUND-NEXT: smsubl
|
| D | mul_pow2.ll | 240 ; CHECK-NEXT: smsubl x0, w0, w8, x1
246 ; GISEL-NEXT: smsubl x0, w0, w8, x1
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-arithmetic-encoding.s | 465 smsubl x1, w2, w3, x4
474 ; CHECK: smsubl x1, w2, w3, x4 ; encoding: [0x41,0x90,0x23,0x9b]
|
| D | basic-a64-instructions.s | 1599 smsubl x3, w5, w2, x9
1600 smsubl xzr, w10, w11, x12
1601 smsubl x13, wzr, w14, x15
1602 smsubl x16, w17, wzr, x18
1603 smsubl x19, w20, w21, xzr
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-arithmetic-encoding.s | 465 smsubl x1, w2, w3, x4
474 ; CHECK: smsubl x1, w2, w3, x4 ; encoding: [0x41,0x90,0x23,0x9b]
|
| D | basic-a64-instructions.s | 1616 smsubl x3, w5, w2, x9
1617 smsubl xzr, w10, w11, x12
1618 smsubl x13, wzr, w14, x15
1619 smsubl x16, w17, wzr, x18
1620 smsubl x19, w20, w21, xzr
|
| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 519 smsubl x3, w5, w2, x9 label
520 smsubl xzr, w10, w11, x12 label
521 smsubl x13, wzr, w14, x15 label
522 smsubl x16, w17, wzr, x18 label
1836 # CHECK-NEXT: 1 4 1.00 smsubl x3, w5, w2, x9
1837 # CHECK-NEXT: 1 4 1.00 smsubl xzr, w10, w11, x12
1838 # CHECK-NEXT: 1 4 1.00 smsubl x13, wzr, w14, x15
1839 # CHECK-NEXT: 1 4 1.00 smsubl x16, w17, wzr, x18
3019 … - - - - - - - - - 1.00 - smsubl x3, w5, w2, x9
3020 … - - - - - - - - 1.00 - smsubl xzr, w10, w11, x12
[all …]
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 623 0xa3,0xa4,0x22,0x9b = smsubl x3, w5, w2, x9
624 0x5f,0xb1,0x2b,0x9b = smsubl xzr, w10, w11, x12
625 0xed,0xbf,0x2e,0x9b = smsubl x13, wzr, w14, x15
626 0x30,0xca,0x3f,0x9b = smsubl x16, w17, wzr, x18
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 432 # CHECK: smsubl x1, w2, w3, x4
|
| D | basic-a64-instructions.txt | 1177 # CHECK: smsubl x3, w5, w2, x9
1178 # CHECK: smsubl xzr, w10, w11, x12
1179 # CHECK: smsubl x13, wzr, w14, x15
1180 # CHECK: smsubl x16, w17, wzr, x18
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 432 # CHECK: smsubl x1, w2, w3, x4
|
| D | basic-a64-instructions.txt | 1164 # CHECK: smsubl x3, w5, w2, x9
1165 # CHECK: smsubl xzr, w10, w11, x12
1166 # CHECK: smsubl x13, wzr, w14, x15
1167 # CHECK: smsubl x16, w17, wzr, x18
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 468 COMPARE(smsubl(x0, w1, w2, x3), "smsubl x0, w1, w2, x3"); in TEST()
469 COMPARE(smsubl(x30, w21, w22, x16), "smsubl x30, w21, w22, x16"); in TEST()
|
| D | test-cpu-features-aarch64.cc | 430 TEST_NONE(smsubl_0, smsubl(x0, w1, w2, x3))
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1005 void smsubl(const Register& xd,
|
| D | assembler-aarch64.cc | 958 void Assembler::smsubl(const Register& xd, in smsubl() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 2343 smsubl(rd, rn, rm, ra); in Smsubl()
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2366 void smsubl(const Register& xd,
|
| /external/capstone/arch/AArch64/ |
| D | AArch64MappingInsnOp.inc | 5449 { /* AArch64_SMSUBLrrr, ARM64_INS_SMSUBL: smsubl $rd, $rn, $rm, $ra */
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 738 def SMSUBLrrr : WideMulAccum<1, 0b001, "smsubl", sub, sext>;
|