| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics-v5.ll | 15 define i32 @smulbt(i32 %a, i32 %b) {
16 ; CHECK-LABEL: smulbt
17 ; CHECK: smulbt r0, r0, r1
18 %tmp = call i32 @llvm.arm.smulbt(i32 %a, i32 %b)
98 declare i32 @llvm.arm.smulbt(i32 %a, i32 %b) nounwind readnone
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| D | smul.ll | 10 ; CHECK: {{smulbt r0, r0, r1|smultb r0, r1, r0}}
11 ; DISABLED-NOT: {{smulbt|smultb}}
161 ; CHECK: {{smultb r0, r0, r1|smulbt r0, r1, r0}}
162 ; DISABLED-NOT: {{smultb|smulbt}}
172 ; CHECK: {{smultb r0, r1, r0|smulbt r0, r0, r1}}
173 ; DISABLED-NOT: {{smultb|smulbt}}
184 ; CHECK: {{smulbt r0, r0, r1|smultb r0, r1, r0}}
185 ; DISABLED-NOT: {{smulbt|smultb}}
355 ; CHECK: {{smulbt | smultb}}
367 ; CHECK: {{smulbt | smultb}}
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| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-smul.ll | 8 ; CHECK: smulbt r0, r1, r0
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-smul.ll | 8 ; CHECK: smulbt r0, r1, r0
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| /external/arm-neon-tests/ |
| D | ref_dsp.c | 270 sres = smulbt(svar1, svar2); in exec_dsp()
281 sres = smulbt(svar1, svar2); in exec_dsp()
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| D | ref-rvct-all.txt | 8007 smulbt(0x12345678, 0x12345678) = 0x6260060
8011 smulbt(0xf123f456, 0xf123f456) = 0xad5dc2
|
| /external/webrtc/common_audio/signal_processing/ |
| D | filter_ar_fast_q12_armv7.S | 96 smulbt r6, r10, r9 @ output2 = coefficients[0] * data_in[i + 1];
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| /external/llvm/test/CodeGen/ARM/ |
| D | smul.ll | 10 ; CHECK: smulbt
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 71 M(smulbt) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 72 M(smulbt) \
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 287 smulbt r0, r1, r2 label
718 # CHECK-NEXT: 1 2 1.00 smulbt r0, r1, r2
1158 … - - - 1.00 - - - - - - - smulbt r0, r1, r2
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| D | m4-int.s | 295 smulbt r0, r1, r2 label
741 # CHECK-NEXT: 1 1 1.00 smulbt r0, r1, r2
1179 # CHECK-NEXT: 1.00 smulbt r0, r1, r2
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| D | cortex-a57-basic-instructions.s | 625 smulbt r5, r4, r1
1495 # CHECK-NEXT: 1 3 1.00 smulbt r5, r4, r1
2372 # CHECK-NEXT: - - - - 1.00 - - - smulbt r5, r4, r1
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| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 780 0x14,0xfb,0x11,0xf5 = smulbt r5, r4, r1
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| D | basic-arm-instructions.s.cs | 698 0xc4,0x01,0x65,0xe1 = smulbt r5, r4, r1
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3210 void smulbt(Condition cond, Register rd, Register rn, Register rm);
3211 void smulbt(Register rd, Register rn, Register rm) { smulbt(al, rd, rn, rm); } in smulbt() function
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| D | disasm-aarch32.h | 1167 void smulbt(Condition cond, Register rd, Register rn, Register rm);
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2578 smulbt r5, r4, r1
2587 @ CHECK: smulbt r5, r4, r1 @ encoding: [0xc4,0x01,0x65,0xe1]
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| D | basic-thumb2-instructions.s | 2677 smulbt r5, r4, r1
2687 @ CHECK: smulbt r5, r4, r1 @ encoding: [0x14,0xfb,0x11,0xf5]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2548 smulbt r5, r4, r1
2557 @ CHECK: smulbt r5, r4, r1 @ encoding: [0xc4,0x01,0x65,0xe1]
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| D | basic-thumb2-instructions.s | 2468 smulbt r5, r4, r1
2478 @ CHECK: smulbt r5, r4, r1 @ encoding: [0x14,0xfb,0x11,0xf5]
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1756 # CHECK: smulbt r5, r4, r1
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1756 # CHECK: smulbt r5, r4, r1
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 823 { /* ARM_SMULBT, ARM_INS_SMULBT: smulbt${p} $rd, $rn, $rm */
6049 { /* ARM_t2SMULBT, ARM_INS_SMULBT: smulbt${p} $rd, $rn, $rm */
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 823 { /* ARM_SMULBT, ARM_INS_SMULBT: smulbt${p} $rd, $rn, $rm */
6049 { /* ARM_t2SMULBT, ARM_INS_SMULBT: smulbt${p} $rd, $rn, $rm */
|