/external/llvm-project/llvm/test/MC/AArch64/SVE2/ |
D | srsra-diagnostics.s | 3 srsra z30.b, z10.b, #0 label 8 srsra z18.b, z27.b, #9 label 13 srsra z26.h, z4.h, #0 label 18 srsra z25.h, z10.h, #17 label 23 srsra z17.s, z0.s, #0 label 28 srsra z0.s, z15.s, #33 label 33 srsra z4.d, z13.d, #0 label 38 srsra z26.d, z26.d, #65 label 47 srsra z0.b, z0.d, #1 label 57 srsra z0.d, z1.d, #64 label
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D | srsra.s | 10 srsra z0.b, z0.b, #1 label 16 srsra z31.b, z31.b, #8 label 22 srsra z0.h, z0.h, #1 label 28 srsra z31.h, z31.h, #16 label 34 srsra z0.s, z0.s, #1 label 40 srsra z31.s, z31.s, #32 label 46 srsra z0.d, z0.d, #1 label 52 srsra z31.d, z31.d, #64 label 68 srsra z0.d, z1.d, #1 label
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/external/capstone/suite/MC/AArch64/ |
D | neon-simd-shift.s.cs | 44 0x20,0x34,0x0d,0x0f = srsra v0.8b, v1.8b, #3 45 0x20,0x34,0x1d,0x0f = srsra v0.4h, v1.4h, #3 46 0x20,0x34,0x3d,0x0f = srsra v0.2s, v1.2s, #3 47 0x20,0x34,0x0d,0x4f = srsra v0.16b, v1.16b, #3 48 0x20,0x34,0x1d,0x4f = srsra v0.8h, v1.8h, #3 49 0x20,0x34,0x3d,0x4f = srsra v0.4s, v1.4s, #3 50 0x20,0x34,0x7d,0x4f = srsra v0.2d, v1.2d, #3
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D | neon-scalar-shift-imm.s.cs | 8 0x6f,0x35,0x6d,0x5f = srsra d15, d11, #19
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/external/llvm/test/MC/AArch64/ |
D | neon-simd-shift.s | 123 srsra v0.8b, v1.8b, #3 124 srsra v0.4h, v1.4h, #3 125 srsra v0.2s, v1.2s, #3 126 srsra v0.16b, v1.16b, #3 127 srsra v0.8h, v1.8h, #3 128 srsra v0.4s, v1.4s, #3 129 srsra v0.2d, v1.2d, #3
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D | neon-scalar-shift-imm.s | 50 srsra d15, d11, #19
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D | arm64-advsimd.s | 1376 srsra d0, d0, #1 define 1425 ; CHECK: srsra d0, d0, #1 ; encoding: [0x00,0x34,0x7f,0x5f] 1538 srsra.8b v0, v0, #1 1539 srsra.16b v0, v0, #2 1540 srsra.4h v0, v0, #3 1541 srsra.8h v0, v0, #4 1542 srsra.2s v0, v0, #5 1543 srsra.4s v0, v0, #6 1544 srsra.2d v0, v0, #7 1710 ; CHECK: srsra.8b v0, v0, #1 ; encoding: [0x00,0x34,0x0f,0x0f] [all …]
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D | neon-diagnostics.s | 1576 srsra v0.8b, v1.8h, #3 1577 srsra v0.4h, v1.4s, #3 1578 srsra v0.2s, v1.2d, #3 1579 srsra v0.16b, v1.16b, #9 1580 srsra v0.8h, v1.8h, #17 1581 srsra v0.4s, v1.4s, #33 1582 srsra v0.2d, v1.2d, #65 4973 srsra d15, d11, #99
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/external/llvm-project/llvm/test/MC/AArch64/ |
D | neon-simd-shift.s | 123 srsra v0.8b, v1.8b, #3 124 srsra v0.4h, v1.4h, #3 125 srsra v0.2s, v1.2s, #3 126 srsra v0.16b, v1.16b, #3 127 srsra v0.8h, v1.8h, #3 128 srsra v0.4s, v1.4s, #3 129 srsra v0.2d, v1.2d, #3
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D | neon-scalar-shift-imm.s | 50 srsra d15, d11, #19
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D | arm64-advsimd.s | 1376 srsra d0, d0, #1 define 1425 ; CHECK: srsra d0, d0, #1 ; encoding: [0x00,0x34,0x7f,0x5f] 1538 srsra.8b v0, v0, #1 1539 srsra.16b v0, v0, #2 1540 srsra.4h v0, v0, #3 1541 srsra.8h v0, v0, #4 1542 srsra.2s v0, v0, #5 1543 srsra.4s v0, v0, #6 1544 srsra.2d v0, v0, #7 1710 ; CHECK: srsra.8b v0, v0, #1 ; encoding: [0x00,0x34,0x0f,0x0f] [all …]
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D | neon-diagnostics.s | 1581 srsra v0.8b, v1.8h, #3 1582 srsra v0.4h, v1.4s, #3 1583 srsra v0.2s, v1.2d, #3 1584 srsra v0.16b, v1.16b, #9 1585 srsra v0.8h, v1.8h, #17 1586 srsra v0.4s, v1.4s, #33 1587 srsra v0.2d, v1.2d, #65 4913 srsra d15, d11, #99
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/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | sve2-intrinsics-uniform-dsp.ll | 1071 ; CHECK: srsra z0.b, z1.b, #2 1073 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.srsra.nxv16i8(<vscale x 16 x i8> %a, 1081 ; CHECK: srsra z0.h, z1.h, #15 1083 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.srsra.nxv8i16(<vscale x 8 x i16> %a, 1091 ; CHECK: srsra z0.s, z1.s, #12 1093 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.srsra.nxv4i32(<vscale x 4 x i32> %a, 1101 ; CHECK: srsra z0.d, z1.d, #44 1103 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.srsra.nxv2i64(<vscale x 2 x i64> %a, 2006 declare <vscale x 16 x i8> @llvm.aarch64.sve.srsra.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, … 2007 declare <vscale x 8 x i16> @llvm.aarch64.sve.srsra.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, … [all …]
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D | arm64-vshift.ll | 1642 ;CHECK: srsra.8b v0, {{v[0-9]+}}, #1 1652 ;CHECK: srsra.4h v0, {{v[0-9]+}}, #1 1662 ;CHECK: srsra.2s v0, {{v[0-9]+}}, #1 1672 ;CHECK: srsra.16b v0, {{v[0-9]+}}, #1 1682 ;CHECK: srsra.8h v0, {{v[0-9]+}}, #1 1692 ;CHECK: srsra.4s v0, {{v[0-9]+}}, #1 1702 ;CHECK: srsra.2d v0, {{v[0-9]+}}, #1
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/external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 1831 # CHECK: srsra d0, d0, #0x3f 2113 # CHECK: srsra.8b v0, v0, #0x7 2114 # CHECK: srsra.16b v0, v0, #0x6 2115 # CHECK: srsra.4h v0, v0, #0xd 2116 # CHECK: srsra.8h v0, v0, #0xc 2117 # CHECK: srsra.2s v0, v0, #0x1b 2118 # CHECK: srsra.4s v0, v0, #0x1a 2119 # CHECK: srsra.2d v0, v0, #0x39
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D | neon-instructions.txt | 828 # CHECK: srsra v0.8b, v1.8b, #3 829 # CHECK: srsra v0.4h, v1.4h, #3 830 # CHECK: srsra v0.2s, v1.2s, #3 831 # CHECK: srsra v0.16b, v1.16b, #3 832 # CHECK: srsra v0.8h, v1.8h, #3 833 # CHECK: srsra v0.4s, v1.4s, #3 834 # CHECK: srsra v0.2d, v1.2d, #3 1852 # CHECK: srsra d15, d11, #19
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 1831 # CHECK: srsra d0, d0, #0x3f 2113 # CHECK: srsra.8b v0, v0, #0x7 2114 # CHECK: srsra.16b v0, v0, #0x6 2115 # CHECK: srsra.4h v0, v0, #0xd 2116 # CHECK: srsra.8h v0, v0, #0xc 2117 # CHECK: srsra.2s v0, v0, #0x1b 2118 # CHECK: srsra.4s v0, v0, #0x1a 2119 # CHECK: srsra.2d v0, v0, #0x39
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D | neon-instructions.txt | 828 # CHECK: srsra v0.8b, v1.8b, #3 829 # CHECK: srsra v0.4h, v1.4h, #3 830 # CHECK: srsra v0.2s, v1.2s, #3 831 # CHECK: srsra v0.16b, v1.16b, #3 832 # CHECK: srsra v0.8h, v1.8h, #3 833 # CHECK: srsra v0.4s, v1.4s, #3 834 # CHECK: srsra v0.2d, v1.2d, #3 1852 # CHECK: srsra d15, d11, #19
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vshift.ll | 1445 ;CHECK: srsra.8b v0, {{v[0-9]+}}, #1 1455 ;CHECK: srsra.4h v0, {{v[0-9]+}}, #1 1465 ;CHECK: srsra.2s v0, {{v[0-9]+}}, #1 1475 ;CHECK: srsra.16b v0, {{v[0-9]+}}, #1 1485 ;CHECK: srsra.8h v0, {{v[0-9]+}}, #1 1495 ;CHECK: srsra.4s v0, {{v[0-9]+}}, #1 1505 ;CHECK: srsra.2d v0, {{v[0-9]+}}, #1
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1746 __ srsra(d21, d30, 63); in GenerateTestSequenceNEON() local 1747 __ srsra(v27.V16B(), v30.V16B(), 6); in GenerateTestSequenceNEON() local 1748 __ srsra(v20.V2D(), v12.V2D(), 27); in GenerateTestSequenceNEON() local 1749 __ srsra(v0.V2S(), v17.V2S(), 5); in GenerateTestSequenceNEON() local 1750 __ srsra(v14.V4H(), v16.V4H(), 15); in GenerateTestSequenceNEON() local 1751 __ srsra(v18.V4S(), v3.V4S(), 20); in GenerateTestSequenceNEON() local 1752 __ srsra(v21.V8B(), v1.V8B(), 1); in GenerateTestSequenceNEON() local 1753 __ srsra(v31.V8H(), v25.V8H(), 2); in GenerateTestSequenceNEON() local
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1510 0x~~~~~~~~~~~~~~~~ 5f4137d5 srsra d21, d30, #63 1511 0x~~~~~~~~~~~~~~~~ 4f0a37db srsra v27.16b, v30.16b, #6 1512 0x~~~~~~~~~~~~~~~~ 4f653594 srsra v20.2d, v12.2d, #27 1513 0x~~~~~~~~~~~~~~~~ 0f3b3620 srsra v0.2s, v17.2s, #5 1514 0x~~~~~~~~~~~~~~~~ 0f11360e srsra v14.4h, v16.4h, #15 1515 0x~~~~~~~~~~~~~~~~ 4f2c3472 srsra v18.4s, v3.4s, #20 1516 0x~~~~~~~~~~~~~~~~ 0f0f3435 srsra v21.8b, v1.8b, #1 1517 0x~~~~~~~~~~~~~~~~ 4f1e373f srsra v31.8h, v25.8h, #2
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D | log-disasm | 1510 0x~~~~~~~~~~~~~~~~ 5f4137d5 srsra d21, d30, #63 1511 0x~~~~~~~~~~~~~~~~ 4f0a37db srsra v27.16b, v30.16b, #6 1512 0x~~~~~~~~~~~~~~~~ 4f653594 srsra v20.2d, v12.2d, #27 1513 0x~~~~~~~~~~~~~~~~ 0f3b3620 srsra v0.2s, v17.2s, #5 1514 0x~~~~~~~~~~~~~~~~ 0f11360e srsra v14.4h, v16.4h, #15 1515 0x~~~~~~~~~~~~~~~~ 4f2c3472 srsra v18.4s, v3.4s, #20 1516 0x~~~~~~~~~~~~~~~~ 0f0f3435 srsra v21.8b, v1.8b, #1 1517 0x~~~~~~~~~~~~~~~~ 4f1e373f srsra v31.8h, v25.8h, #2
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D | log-cpufeatures-custom | 1509 0x~~~~~~~~~~~~~~~~ 5f4137d5 srsra d21, d30, #63 ### {NEON} ### 1510 0x~~~~~~~~~~~~~~~~ 4f0a37db srsra v27.16b, v30.16b, #6 ### {NEON} ### 1511 0x~~~~~~~~~~~~~~~~ 4f653594 srsra v20.2d, v12.2d, #27 ### {NEON} ### 1512 0x~~~~~~~~~~~~~~~~ 0f3b3620 srsra v0.2s, v17.2s, #5 ### {NEON} ### 1513 0x~~~~~~~~~~~~~~~~ 0f11360e srsra v14.4h, v16.4h, #15 ### {NEON} ### 1514 0x~~~~~~~~~~~~~~~~ 4f2c3472 srsra v18.4s, v3.4s, #20 ### {NEON} ### 1515 0x~~~~~~~~~~~~~~~~ 0f0f3435 srsra v21.8b, v1.8b, #1 ### {NEON} ### 1516 0x~~~~~~~~~~~~~~~~ 4f1e373f srsra v31.8h, v25.8h, #2 ### {NEON} ###
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D | log-cpufeatures-colour | 1509 0x~~~~~~~~~~~~~~~~ 5f4137d5 srsra d21, d30, #63 [1;35mNEON[0;m 1510 0x~~~~~~~~~~~~~~~~ 4f0a37db srsra v27.16b, v30.16b, #6 [1;35mNEON[0;m 1511 0x~~~~~~~~~~~~~~~~ 4f653594 srsra v20.2d, v12.2d, #27 [1;35mNEON[0;m 1512 0x~~~~~~~~~~~~~~~~ 0f3b3620 srsra v0.2s, v17.2s, #5 [1;35mNEON[0;m 1513 0x~~~~~~~~~~~~~~~~ 0f11360e srsra v14.4h, v16.4h, #15 [1;35mNEON[0;m 1514 0x~~~~~~~~~~~~~~~~ 4f2c3472 srsra v18.4s, v3.4s, #20 [1;35mNEON[0;m 1515 0x~~~~~~~~~~~~~~~~ 0f0f3435 srsra v21.8b, v1.8b, #1 [1;35mNEON[0;m 1516 0x~~~~~~~~~~~~~~~~ 4f1e373f srsra v31.8h, v25.8h, #2 [1;35mNEON[0;m
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/external/capstone/arch/AArch64/ |
D | AArch64MappingInsnOp.inc | 6425 { /* AArch64_SRSRAd, ARM64_INS_SRSRA: srsra $rd, $rn, $imm */ 6429 { /* AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA: srsra.16b $rd, $rn, $imm */ 6433 { /* AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA: srsra.2s $rd, $rn, $imm */ 6437 { /* AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA: srsra.2d $rd, $rn, $imm */ 6441 { /* AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA: srsra.4h $rd, $rn, $imm */ 6445 { /* AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA: srsra.4s $rd, $rn, $imm */ 6449 { /* AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA: srsra.8h $rd, $rn, $imm */ 6453 { /* AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA: srsra.8b $rd, $rn, $imm */
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