| /external/pcre/dist2/src/ |
| D | pcre2_dfa_match.c | 750 int state_offset = current_state->offset; in internal_dfa_match() local
759 if (state_offset < 0) in internal_dfa_match()
763 ADD_NEW_DATA(state_offset, current_state->count, in internal_dfa_match()
770 current_state->offset = state_offset = -state_offset; in internal_dfa_match()
780 if (active_states[j].offset == state_offset && in internal_dfa_match()
787 code = start_code + state_offset; in internal_dfa_match()
873 ADD_ACTIVE(state_offset + 1 + LINK_SIZE, 0); in internal_dfa_match()
876 ADD_ACTIVE(state_offset - (int)GET(code, 1), 0); in internal_dfa_match()
938 ADD_ACTIVE(state_offset + 1, 0); in internal_dfa_match()
954 { ADD_ACTIVE(state_offset + 1, 0); } in internal_dfa_match()
[all …]
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| /external/boringssl/src/crypto/test/asm/ |
| D | trampoline-x86_64.pl | 166 my $state_offset = $func_offset + 8;
172 $scratch_offset = $state_offset + 8;
174 $unwind_offset = $state_offset + 8;
208 movq $state, $state_offset(%rsp)
281 movq $state_offset(%rsp), $state
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| /external/libchrome/base/i18n/ |
| D | build_utf8_validator_tables.cc | 375 std::vector<uint8_t> state_offset(1, 0); in PrintStates() local
396 state_offset.push_back(pos); in PrintStates()
399 DCHECK_EQ(129, state_offset[1]); in PrintStates()
411 static_cast<int>(state_offset[state_index])); in PrintStates()
420 table_printer.PrintValue(state_offset[target_state]); in PrintStates()
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| /external/mesa3d/src/intel/vulkan/ |
| D | genX_blorp_exec.c | 116 uint32_t state_offset; in blorp_alloc_binding_table() local
121 &state_offset, &bt_state); in blorp_alloc_binding_table()
131 bt_map[i] = surface_state.offset + state_offset; in blorp_alloc_binding_table()
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| D | anv_blorp.c | 1321 uint32_t *state_offset, in anv_cmd_buffer_alloc_blorp_binding_table() argument
1325 state_offset); in anv_cmd_buffer_alloc_blorp_binding_table()
1338 state_offset); in anv_cmd_buffer_alloc_blorp_binding_table()
1350 uint32_t state_offset; in binding_table_for_surface_state() local
1354 anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, 1, &state_offset, in binding_table_for_surface_state()
1360 bt_map[0] = surface_state.offset + state_offset; in binding_table_for_surface_state()
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| D | genX_cmd_buffer.c | 2545 uint32_t state_offset; in emit_binding_table() local
2555 &state_offset); in emit_binding_table()
2601 bt_map[s] = surface_state.offset + state_offset; in emit_binding_table()
2624 bt_map[s] = surface_state.offset + state_offset; in emit_binding_table()
2646 bt_map[s] = surface_state.offset + state_offset; in emit_binding_table()
2662 bt_map[s] = set->desc_surface_state.offset + state_offset; in emit_binding_table()
2829 bt_map[s] = surface_state.offset + state_offset; in emit_binding_table()
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| D | anv_batch_chain.c | 727 uint32_t entries, uint32_t *state_offset) in anv_cmd_buffer_alloc_binding_table() argument
743 *state_offset = -bt_block->offset; in anv_cmd_buffer_alloc_binding_table()
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| D | anv_private.h | 3095 uint32_t entries, uint32_t *state_offset);
3128 uint32_t *state_offset,
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_misc_state.c | 68 OUT_RELOC(brw->batch.state.bo, 0, brw->vs.base.state_offset); in upload_pipelined_state_pointers()
70 OUT_RELOC(brw->batch.state.bo, 0, brw->ff_gs.state_offset | 1); in upload_pipelined_state_pointers()
73 OUT_RELOC(brw->batch.state.bo, 0, brw->clip.state_offset | 1); in upload_pipelined_state_pointers()
74 OUT_RELOC(brw->batch.state.bo, 0, brw->sf.state_offset); in upload_pipelined_state_pointers()
75 OUT_RELOC(brw->batch.state.bo, 0, brw->wm.base.state_offset); in upload_pipelined_state_pointers()
76 OUT_RELOC(brw->batch.state.bo, 0, brw->cc.state_offset); in upload_pipelined_state_pointers()
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| D | brw_context.h | 644 uint32_t state_offset; member
1116 uint32_t state_offset; member
1134 uint32_t state_offset; member
1155 uint32_t state_offset; member
1176 uint32_t state_offset; member
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| D | intel_batchbuffer.c | 639 OUT_BATCH(brw->cc.state_offset | 1); in brw_finish_batch()
1021 brw_state_reloc(struct intel_batchbuffer *batch, uint32_t state_offset, in brw_state_reloc() argument
1025 assert(state_offset <= batch->state.bo->size - sizeof(uint32_t)); in brw_state_reloc()
1027 return emit_reloc(batch, &batch->state_relocs, state_offset, in brw_state_reloc()
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| D | genX_state_upload.c | 1286 brw_state_emit(brw, GENX(CLIP_STATE), 32, &brw->clip.state_offset, clip) { in genX()
1528 brw_state_emit(brw, GENX(SF_STATE), 64, &brw->sf.state_offset, sf) {
1824 brw_state_emit(brw, GENX(WM_STATE), 64, &stage_state->state_offset, wm) {
2166 brw_state_emit(brw, GENX(VS_STATE), 32, &stage_state->state_offset, vs) {
2604 brw_state_emit(brw, GENX(GS_STATE), 32, &brw->ff_gs.state_offset, gs) {
3363 brw_state_emit(brw, GENX(COLOR_CALC_STATE), 64, &brw->cc.state_offset, cc) {
3405 ptr.ColorCalcStatePointer = brw->cc.state_offset;
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| /external/mesa3d/src/intel/common/ |
| D | gen_batch_decoder.c | 740 uint32_t state_offset = 0; in decode_dynamic_state_pointers() local
746 state_offset = iter.raw_value; in decode_dynamic_state_pointers()
751 uint64_t state_addr = ctx->dynamic_base + state_offset; in decode_dynamic_state_pointers()
776 count = update_count(ctx, ctx->dynamic_base + state_offset, in decode_dynamic_state_pointers()
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| /external/mesa3d/src/intel/blorp/ |
| D | blorp_genX_exec.h | 1403 void *state, uint32_t state_offset, in blorp_emit_surface_state() argument
1454 blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset, in blorp_emit_surface_state()
1464 blorp_surface_reloc(batch, state_offset + isl_dev->ss.aux_addr_offset, in blorp_emit_surface_state()
1472 blorp_surface_reloc(batch, state_offset + in blorp_emit_surface_state()
1481 dst_addr.offset += state_offset + isl_dev->ss.clear_value_offset; in blorp_emit_surface_state()
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| /external/mesa3d/src/intel/tools/ |
| D | aubinator_viewer_decoder.cpp | 641 uint32_t state_offset = 0; in decode_dynamic_state_pointers() local
647 state_offset = iter.raw_value; in decode_dynamic_state_pointers()
652 uint64_t state_addr = ctx->dynamic_base + state_offset; in decode_dynamic_state_pointers()
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| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 3213 const uword state_offset = ClassHeapStats::state_offset(); in MaybeTraceAllocation() local
3214 ldr(temp_reg, Address(temp_reg, state_offset)); in MaybeTraceAllocation()
|